Registers: Get rid of the float register width parameter.

3 files changed, 2 insertions, 89 deletions

diff --git a/src/cpu/ozone/cpu.hh b/src/cpu/ozone/cpu.hh
index 2e21411ae..62e6f6e5a 100644
--- a/src/cpu/ozone/cpu.hh
+++ b/src/cpu/ozone/cpu.hh
@@ -183,22 +183,14 @@ class OzoneCPU : public BaseCPU
 
         uint64_t readIntReg(int reg_idx);
 
-        FloatReg readFloatReg(int reg_idx, int width);
-
         FloatReg readFloatReg(int reg_idx);
 
-        FloatRegBits readFloatRegBits(int reg_idx, int width);
-
         FloatRegBits readFloatRegBits(int reg_idx);
 
         void setIntReg(int reg_idx, uint64_t val);
 
-        void setFloatReg(int reg_idx, FloatReg val, int width);
-
         void setFloatReg(int reg_idx, FloatReg val);
 
-        void setFloatRegBits(int reg_idx, FloatRegBits val, int width);
-
         void setFloatRegBits(int reg_idx, FloatRegBits val);
 
         uint64_t readPC() { return thread->PC; }
diff --git a/src/cpu/ozone/cpu_impl.hh b/src/cpu/ozone/cpu_impl.hh
index 25fa64071..f86b882d1 100644
--- a/src/cpu/ozone/cpu_impl.hh
+++ b/src/cpu/ozone/cpu_impl.hh
@@ -918,22 +918,6 @@ OzoneCPU<Impl>::OzoneTC::readIntReg(int reg_idx)
 }
 
 template <class Impl>
-TheISA::FloatReg
-OzoneCPU<Impl>::OzoneTC::readFloatReg(int reg_idx, int width)
-{
-    int idx = reg_idx + TheISA::FP_Base_DepTag;
-    switch(width) {
-      case 32:
-        return thread->renameTable[idx]->readFloatResult();
-      case 64:
-        return thread->renameTable[idx]->readDoubleResult();
-      default:
-        panic("Unsupported width!");
-        return 0;
-    }
-}
-
-template <class Impl>
 double
 OzoneCPU<Impl>::OzoneTC::readFloatReg(int reg_idx)
 {
@@ -943,14 +927,6 @@ OzoneCPU<Impl>::OzoneTC::readFloatReg(int reg_idx)
 
 template <class Impl>
 uint64_t
-OzoneCPU<Impl>::OzoneTC::readFloatRegBits(int reg_idx, int width)
-{
-    int idx = reg_idx + TheISA::FP_Base_DepTag;
-    return thread->renameTable[idx]->readIntResult();
-}
-
-template <class Impl>
-uint64_t
 OzoneCPU<Impl>::OzoneTC::readFloatRegBits(int reg_idx)
 {
     int idx = reg_idx + TheISA::FP_Base_DepTag;
@@ -970,27 +946,6 @@ OzoneCPU<Impl>::OzoneTC::setIntReg(int reg_idx, uint64_t val)
 
 template <class Impl>
 void
-OzoneCPU<Impl>::OzoneTC::setFloatReg(int reg_idx, FloatReg val, int width)
-{
-    int idx = reg_idx + TheISA::FP_Base_DepTag;
-    switch(width) {
-      case 32:
-        panic("Unimplemented!");
-        break;
-      case 64:
-        thread->renameTable[idx]->setDoubleResult(val);
-        break;
-      default:
-        panic("Unsupported width!");
-    }
-
-    if (!thread->inSyscall) {
-        cpu->squashFromTC();
-    }
-}
-
-template <class Impl>
-void
 OzoneCPU<Impl>::OzoneTC::setFloatReg(int reg_idx, FloatReg val)
 {
     int idx = reg_idx + TheISA::FP_Base_DepTag;
@@ -1004,14 +959,6 @@ OzoneCPU<Impl>::OzoneTC::setFloatReg(int reg_idx, FloatReg val)
 
 template <class Impl>
 void
-OzoneCPU<Impl>::OzoneTC::setFloatRegBits(int reg_idx, FloatRegBits val,
-                                         int width)
-{
-    panic("Unimplemented!");
-}
-
-template <class Impl>
-void
 OzoneCPU<Impl>::OzoneTC::setFloatRegBits(int reg_idx, FloatRegBits val)
 {
     panic("Unimplemented!");
diff --git a/src/cpu/ozone/dyn_inst.hh b/src/cpu/ozone/dyn_inst.hh
index e138cbe13..a39f383ba 100644
--- a/src/cpu/ozone/dyn_inst.hh
+++ b/src/cpu/ozone/dyn_inst.hh
@@ -151,28 +151,14 @@ class OzoneDynInst : public BaseDynInst<Impl>
         return srcInsts[idx]->readIntResult();
     }
 
-    FloatReg readFloatRegOperand(const StaticInst *si, int idx, int width)
-    {
-        switch(width) {
-          case 32:
-            return srcInsts[idx]->readFloatResult();
-          case 64:
-            return srcInsts[idx]->readDoubleResult();
-          default:
-            panic("Width not supported");
-            return 0;
-        }
-    }
-
     FloatReg readFloatRegOperand(const StaticInst *si, int idx)
     {
         return srcInsts[idx]->readFloatResult();
     }
 
-    FloatRegBits readFloatRegOperandBits(const StaticInst *si, int idx,
-                                         int width)
+    FloatReg readFloatRegOperand(const StaticInst *si, int idx)
     {
-        return srcInsts[idx]->readIntResult();
+        return srcInsts[idx]->readFloatResult();
     }
 
     FloatRegBits readFloatRegOperandBits(const StaticInst *si, int idx)
@@ -188,24 +174,12 @@ class OzoneDynInst : public BaseDynInst<Impl>
         BaseDynInst<Impl>::setIntReg(si, idx, val);
     }
 
-    void setFloatRegOperand(const StaticInst *si, int idx, FloatReg val,
-                            int width)
-    {
-        BaseDynInst<Impl>::setFloatReg(si, idx, val, width);
-    }
-
     void setFloatRegOperand(const StaticInst *si, int idx, FloatReg val)
     {
         BaseDynInst<Impl>::setFloatReg(si, idx, val);
     }
 
     void setFloatRegOperandBits(const StaticInst *si, int idx,
-                                FloatRegBits val, int width)
-    {
-        BaseDynInst<Impl>::setFloatRegBits(si, idx, val);
-    }
-
-    void setFloatRegOperandBits(const StaticInst *si, int idx,
                                 FloatRegBits val)
     {
         BaseDynInst<Impl>::setFloatRegBits(si, idx, val);