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| author | Gabe Black <gblack@eecs.umich.edu> | 2007-01-27 01:59:20 -0500 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2007-01-27 01:59:20 -0500 |
| commit | 0358ccee23072eef0b6448e3170457037682a452 (patch) | |
| tree | 378b5ba325d74536092a7f245423d81274db38b4 /src/cpu/ozone | |
| parent | e41f54f97f9ebdea32cc6498c346636cddc9e06d (diff) | |
| parent | 5c7bf74c073d0aea808046d10dfcaa6c319217a3 (diff) | |
| download | gem5-0358ccee23072eef0b6448e3170457037682a452.tar.xz | |
Merge zizzer:/bk/newmem
into zower.eecs.umich.edu:/eecshome/m5/newmem
src/arch/sparc/isa/formats/mem/util.isa:
src/arch/sparc/isa_traits.hh:
src/arch/sparc/system.cc:
Hand Merge
--HG--
extra : convert_revision : d5e0c97caebb616493e2f642e915969d7028109c
Diffstat (limited to 'src/cpu/ozone')
| -rw-r--r-- | src/cpu/ozone/cpu_impl.hh | 7 | ||||
| -rw-r--r-- | src/cpu/ozone/inorder_back_end_impl.hh | 4 |
2 files changed, 1 insertions, 10 deletions
diff --git a/src/cpu/ozone/cpu_impl.hh b/src/cpu/ozone/cpu_impl.hh index accc8d294..a854de8de 100644 --- a/src/cpu/ozone/cpu_impl.hh +++ b/src/cpu/ozone/cpu_impl.hh @@ -182,10 +182,6 @@ OzoneCPU<Impl>::OzoneCPU(Params *p) globalSeqNum = 1; -#if FULL_SYSTEM - checkInterrupts = false; -#endif - lockFlag = 0; // Setup rename table, initializing all values to ready. @@ -684,8 +680,6 @@ OzoneCPU<Impl>::hwrei() lockAddrList.clear(); thread.kernelStats->hwrei(); - checkInterrupts = true; - // FIXME: XXX check for interrupts? XXX return NoFault; } @@ -704,7 +698,6 @@ OzoneCPU<Impl>::processInterrupts() if (interrupt != NoFault) { this->interrupts.updateIntrInfo(thread.getTC()); - this->checkInterrupts = false; interrupt->invoke(thread.getTC()); } } diff --git a/src/cpu/ozone/inorder_back_end_impl.hh b/src/cpu/ozone/inorder_back_end_impl.hh index 87bf0a7a2..84f935a72 100644 --- a/src/cpu/ozone/inorder_back_end_impl.hh +++ b/src/cpu/ozone/inorder_back_end_impl.hh @@ -88,7 +88,6 @@ InorderBackEnd<Impl>::checkInterrupts() int ipl = 0; int summary = 0; - cpu->checkInterrupts = false; if (thread->readMiscReg(IPR_ASTRR)) panic("asynchronous traps not implemented\n"); @@ -151,8 +150,7 @@ InorderBackEnd<Impl>::tick() // I'm waiting for it to drain. (for now just squash) #if FULL_SYSTEM if (interruptBlocked || - (cpu->checkInterrupts && - cpu->check_interrupts(tc))) { + cpu->check_interrupts(tc)) { if (!robEmpty()) { interruptBlocked = true; //AlphaDep |