make BaseCPU the provider of _cpuId, and cpuId() instead of being scattered

across the subclasses. generally make it so that member data is _cpuId and
accessor functions are cpuId(). The ID val comes from the python (default -1 if
none provided), and if it is -1, the index of cpuList will be given. this has
passed util/regress quick and se.py -n4 and fs.py -n4 as well as standard
switch.

3 files changed, 3 insertions, 13 deletions

diff --git a/src/cpu/ozone/cpu.hh b/src/cpu/ozone/cpu.hh
index 491e6ba93..8fce61d4f 100644
--- a/src/cpu/ozone/cpu.hh
+++ b/src/cpu/ozone/cpu.hh
@@ -116,10 +116,6 @@ class OzoneCPU : public BaseCPU
 
         BaseCPU *getCpuPtr();
 
-        void setCpuId(int id);
-
-        int readCpuId() { return thread->readCpuId(); }
-
         TheISA::ITB *getITBPtr() { return cpu->itb; }
 
         TheISA::DTB * getDTBPtr() { return cpu->dtb; }
@@ -353,12 +349,6 @@ class OzoneCPU : public BaseCPU
   public:
     BaseCPU *getCpuPtr() { return this; }
 
-    void setCpuId(int id) { cpuId = id; }
-
-    int readCpuId() { return cpuId; }
-
-    int cpuId;
-
     void switchOut();
     void signalSwitched();
     void takeOverFrom(BaseCPU *oldCPU);
diff --git a/src/cpu/ozone/cpu_impl.hh b/src/cpu/ozone/cpu_impl.hh
index a7efa3596..52376afd8 100644
--- a/src/cpu/ozone/cpu_impl.hh
+++ b/src/cpu/ozone/cpu_impl.hh
@@ -417,7 +417,7 @@ OzoneCPU<Impl>::init()
         ThreadContext *tc = threadContexts[i];
 
         // initialize CPU, including PC
-        TheISA::initCPU(tc, tc->readCpuId());
+        TheISA::initCPU(tc, tc->cpuId());
     }
 #endif
     frontEnd->renameTable.copyFrom(thread.renameTable);
@@ -803,7 +803,7 @@ OzoneCPU<Impl>::OzoneTC::takeOverFrom(ThreadContext *old_context)
     // copy over functional state
     setStatus(old_context->status());
     copyArchRegs(old_context);
-    setCpuId(old_context->readCpuId());
+    setCpuId(old_context->cpuId());
 
     thread->setInst(old_context->getInst());
 #if !FULL_SYSTEM
diff --git a/src/cpu/ozone/front_end_impl.hh b/src/cpu/ozone/front_end_impl.hh
index 198ce0308..df3609e27 100644
--- a/src/cpu/ozone/front_end_impl.hh
+++ b/src/cpu/ozone/front_end_impl.hh
@@ -477,7 +477,7 @@ FrontEnd<Impl>::fetchCacheLine()
     // Setup the memReq to do a read of the first isntruction's address.
     // Set the appropriate read size and flags as well.
     memReq = new Request(0, fetch_PC, cacheBlkSize, 0,
-                         PC, cpu->readCpuId(), 0);
+                         PC, cpu->cpuId(), 0);
 
     // Translate the instruction request.
     fault = cpu->translateInstReq(memReq, thread);