summaryrefslogtreecommitdiff
path: root/src/cpu/ozone
diff options
context:
space:
mode:
authorLisa Hsu <hsul@eecs.umich.edu>2008-11-02 21:57:07 -0500
committerLisa Hsu <hsul@eecs.umich.edu>2008-11-02 21:57:07 -0500
commitd857faf073895dcfde97141bd6346fe5d4317f8e (patch)
treebfcd9fadba95b409721597948dd46cfda3744ee0 /src/cpu/ozone
parent67fda02dda290d614de233846fee434b3713b1dc (diff)
downloadgem5-d857faf073895dcfde97141bd6346fe5d4317f8e.tar.xz
Add in Context IDs to the simulator. From now on, cpuId is almost never used,
the primary identifier for a hardware context should be contextId(). The concept of threads within a CPU remains, in the form of threadId() because sometimes you need to know which context within a cpu to manipulate.
Diffstat (limited to 'src/cpu/ozone')
-rw-r--r--src/cpu/ozone/cpu_impl.hh11
-rw-r--r--src/cpu/ozone/front_end_impl.hh2
2 files changed, 3 insertions, 10 deletions
diff --git a/src/cpu/ozone/cpu_impl.hh b/src/cpu/ozone/cpu_impl.hh
index 52376afd8..eef1a7b2f 100644
--- a/src/cpu/ozone/cpu_impl.hh
+++ b/src/cpu/ozone/cpu_impl.hh
@@ -417,7 +417,7 @@ OzoneCPU<Impl>::init()
ThreadContext *tc = threadContexts[i];
// initialize CPU, including PC
- TheISA::initCPU(tc, tc->cpuId());
+ TheISA::initCPU(tc, tc->contextId());
}
#endif
frontEnd->renameTable.copyFrom(thread.renameTable);
@@ -736,14 +736,6 @@ OzoneCPU<Impl>::OzoneTC::getCpuPtr()
template <class Impl>
void
-OzoneCPU<Impl>::OzoneTC::setCpuId(int id)
-{
- cpu->cpuId = id;
- thread->setCpuId(id);
-}
-
-template <class Impl>
-void
OzoneCPU<Impl>::OzoneTC::setStatus(Status new_status)
{
thread->setStatus(new_status);
@@ -804,6 +796,7 @@ OzoneCPU<Impl>::OzoneTC::takeOverFrom(ThreadContext *old_context)
setStatus(old_context->status());
copyArchRegs(old_context);
setCpuId(old_context->cpuId());
+ setContextId(old_context->contextId());
thread->setInst(old_context->getInst());
#if !FULL_SYSTEM
diff --git a/src/cpu/ozone/front_end_impl.hh b/src/cpu/ozone/front_end_impl.hh
index df3609e27..b1e131115 100644
--- a/src/cpu/ozone/front_end_impl.hh
+++ b/src/cpu/ozone/front_end_impl.hh
@@ -477,7 +477,7 @@ FrontEnd<Impl>::fetchCacheLine()
// Setup the memReq to do a read of the first isntruction's address.
// Set the appropriate read size and flags as well.
memReq = new Request(0, fetch_PC, cacheBlkSize, 0,
- PC, cpu->cpuId(), 0);
+ PC, cpu->thread->contextId());
// Translate the instruction request.
fault = cpu->translateInstReq(memReq, thread);