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authorAndreas Hansson <andreas.hansson@arm.com>2013-07-18 08:31:16 -0400
committerAndreas Hansson <andreas.hansson@arm.com>2013-07-18 08:31:16 -0400
commitd4273cc9a6f3c00566e97ebcd71509ed14477b37 (patch)
tree9b50625fc5d2bb457a959f379a45687903660237 /src/cpu/pred/BranchPredictor.py
parent4e8ecd7c6fd0447f563179b5a8fdbb13b562ca9e (diff)
downloadgem5-d4273cc9a6f3c00566e97ebcd71509ed14477b37.tar.xz
mem: Set the cache line size on a system level
This patch removes the notion of a peer block size and instead sets the cache line size on the system level. Previously the size was set per cache, and communicated through the interconnect. There were plenty checks to ensure that everyone had the same size specified, and these checks are now removed. Another benefit that is not yet harnessed is that the cache line size is now known at construction time, rather than after the port binding. Hence, the block size can be locally stored and does not have to be queried every time it is used. A follow-on patch updates the configuration scripts accordingly.
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