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authorMitch Hayenga <mitch.hayenga@arm.com>2016-04-05 11:48:37 -0500
committerMitch Hayenga <mitch.hayenga@arm.com>2016-04-05 11:48:37 -0500
commit0fd4bb7f12d8a633f3ff0abe61d4f3a78bca6f84 (patch)
tree865cfc3eb0943a21eea8c07676cfd4ce458d34c2 /src/cpu/pred/SConscript
parent3f6874cb295695a225fca6825bfe24a4b97641fd (diff)
downloadgem5-0fd4bb7f12d8a633f3ff0abe61d4f3a78bca6f84.tar.xz
cpu: Add an indirect branch target predictor
This patch adds a configurable indirect branch predictor that can be indexed by a combination of GHR and path history hashes. Implements the functionality described in: "Target prediction for indirect jumps" by Chang, Hao, and Patt http://dl.acm.org/citation.cfm?id=264209 This is a re-spin of fb9d142 after the revert (bd1c6789).
Diffstat (limited to 'src/cpu/pred/SConscript')
-rw-r--r--src/cpu/pred/SConscript2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/cpu/pred/SConscript b/src/cpu/pred/SConscript
index 1bf94712d..dca5e8d88 100644
--- a/src/cpu/pred/SConscript
+++ b/src/cpu/pred/SConscript
@@ -35,9 +35,11 @@ if env['TARGET_ISA'] == 'null':
SimObject('BranchPredictor.py')
+DebugFlag('Indirect')
Source('bpred_unit.cc')
Source('2bit_local.cc')
Source('btb.cc')
+Source('indirect.cc')
Source('ras.cc')
Source('tournament.cc')
Source ('bi_mode.cc')