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author | Andreas Sandberg <andreas.sandberg@arm.com> | 2016-04-06 19:43:31 +0100 |
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committer | Andreas Sandberg <andreas.sandberg@arm.com> | 2016-04-06 19:43:31 +0100 |
commit | be28d96510e0e722db83b26f1a12d3f5de979b32 (patch) | |
tree | 6a7e1807397f002f51fddb34568b89250fca45c8 /src/cpu/pred/SConscript | |
parent | 8615b27174ae06db4665016c877b1e88031af203 (diff) | |
download | gem5-be28d96510e0e722db83b26f1a12d3f5de979b32.tar.xz |
Revert power patch sets with unexpected interactions
The following patches had unexpected interactions with the current
upstream code and have been reverted for now:
e07fd01651f3: power: Add support for power models
831c7f2f9e39: power: Low-power idle power state for idle CPUs
4f749e00b667: power: Add power states to ClockedObject
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
--HG--
extra : amend_source : 0b6fb073c6bbc24be533ec431eb51fbf1b269508
Diffstat (limited to 'src/cpu/pred/SConscript')
-rw-r--r-- | src/cpu/pred/SConscript | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/src/cpu/pred/SConscript b/src/cpu/pred/SConscript index dca5e8d88..1bf94712d 100644 --- a/src/cpu/pred/SConscript +++ b/src/cpu/pred/SConscript @@ -35,11 +35,9 @@ if env['TARGET_ISA'] == 'null': SimObject('BranchPredictor.py') -DebugFlag('Indirect') Source('bpred_unit.cc') Source('2bit_local.cc') Source('btb.cc') -Source('indirect.cc') Source('ras.cc') Source('tournament.cc') Source ('bi_mode.cc') |