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| author | Nikos Nikoleris <nikos.nikoleris@arm.com> | 2018-11-06 11:24:01 +0000 |
|---|---|---|
| committer | Nikos Nikoleris <nikos.nikoleris@arm.com> | 2018-11-13 14:13:26 +0000 |
| commit | 2f52a9b65ee37ba8f34ac3d46f96dca9afc02c7c (patch) | |
| tree | 0ff1b7b5146a5c0ec1935d43b7ce30405d1bdcde /src/cpu/pred/ltage.cc | |
| parent | d8705a73771ea213b1e52c6cdfad3bd05b3210c5 (diff) | |
| download | gem5-2f52a9b65ee37ba8f34ac3d46f96dca9afc02c7c.tar.xz | |
mem-cache: Align how we handle requests in atomic with timing
Requests, for which a cache has already committed to respond do not
perform any lookups. Previously in atomic mode the packet would pay
the lookup latency while in timing it wouldn't. This patch aligns
recvAtomic with recvTimingReq and removes the lookup latency from the
the handling of such requests.
Change-Id: I50a0631f8058e5086d94d55af0e1788a60e2883f
Signed-off-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/14175
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Diffstat (limited to 'src/cpu/pred/ltage.cc')
0 files changed, 0 insertions, 0 deletions