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authorAndreas Hansson <andreas.hansson@arm.com>2014-09-27 09:08:36 -0400
committerAndreas Hansson <andreas.hansson@arm.com>2014-09-27 09:08:36 -0400
commit341dbf266258dcbdb1e5e9f09c244b8ac271faaf (patch)
treef071f9a91adeb0c1eb0888ae751c3ee0196bd65d /src/cpu/pred
parentdeb2200671d5b4856ca27d4286253db0d9e12a32 (diff)
downloadgem5-341dbf266258dcbdb1e5e9f09c244b8ac271faaf.tar.xz
arch: Use const StaticInstPtr references where possible
This patch optimises the passing of StaticInstPtr by avoiding copying the reference-counting pointer. This avoids first incrementing and then decrementing the reference-counting pointer.
Diffstat (limited to 'src/cpu/pred')
-rw-r--r--src/cpu/pred/bpred_unit.hh4
-rw-r--r--src/cpu/pred/bpred_unit_impl.hh4
2 files changed, 4 insertions, 4 deletions
diff --git a/src/cpu/pred/bpred_unit.hh b/src/cpu/pred/bpred_unit.hh
index f75ab79d5..bca64cce0 100644
--- a/src/cpu/pred/bpred_unit.hh
+++ b/src/cpu/pred/bpred_unit.hh
@@ -87,9 +87,9 @@ class BPredUnit : public SimObject
* @param tid The thread id.
* @return Returns if the branch is taken or not.
*/
- bool predict(StaticInstPtr &inst, const InstSeqNum &seqNum,
+ bool predict(const StaticInstPtr &inst, const InstSeqNum &seqNum,
TheISA::PCState &pc, ThreadID tid);
- bool predictInOrder(StaticInstPtr &inst, const InstSeqNum &seqNum,
+ bool predictInOrder(const StaticInstPtr &inst, const InstSeqNum &seqNum,
int asid, TheISA::PCState &instPC,
TheISA::PCState &predPC, ThreadID tid);
diff --git a/src/cpu/pred/bpred_unit_impl.hh b/src/cpu/pred/bpred_unit_impl.hh
index eaffb7ea1..53ec808b6 100644
--- a/src/cpu/pred/bpred_unit_impl.hh
+++ b/src/cpu/pred/bpred_unit_impl.hh
@@ -129,7 +129,7 @@ BPredUnit::drainSanityCheck() const
}
bool
-BPredUnit::predict(StaticInstPtr &inst, const InstSeqNum &seqNum,
+BPredUnit::predict(const StaticInstPtr &inst, const InstSeqNum &seqNum,
TheISA::PCState &pc, ThreadID tid)
{
// See if branch predictor predicts taken.
@@ -244,7 +244,7 @@ BPredUnit::predict(StaticInstPtr &inst, const InstSeqNum &seqNum,
}
bool
-BPredUnit::predictInOrder(StaticInstPtr &inst, const InstSeqNum &seqNum,
+BPredUnit::predictInOrder(const StaticInstPtr &inst, const InstSeqNum &seqNum,
int asid, TheISA::PCState &instPC,
TheISA::PCState &predPC, ThreadID tid)
{