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authorSteve Reinhardt <steve.reinhardt@amd.com>2016-02-06 17:21:19 -0800
committerSteve Reinhardt <steve.reinhardt@amd.com>2016-02-06 17:21:19 -0800
commit5592798865ece858bab2b444bc782d19121e2566 (patch)
tree80803048c903c424ed9f1200b5dc1a29ed3ff6b8 /src/cpu/pred
parentdc8018a5c3482008232e6faaa2d96cf20aed7485 (diff)
downloadgem5-5592798865ece858bab2b444bc782d19121e2566.tar.xz
style: fix missing spaces in control statements
Result of running 'hg m5style --skip-all --fix-control -a'.
Diffstat (limited to 'src/cpu/pred')
-rw-r--r--src/cpu/pred/bpred_unit.cc2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/cpu/pred/bpred_unit.cc b/src/cpu/pred/bpred_unit.cc
index a5e1ffd59..8bb84f836 100644
--- a/src/cpu/pred/bpred_unit.cc
+++ b/src/cpu/pred/bpred_unit.cc
@@ -415,7 +415,7 @@ BPredUnit::squash(const InstSeqNum &squashed_sn, ThreadID tid)
RAS[tid].restore(pred_hist.front().RASIndex,
pred_hist.front().RASTarget);
- } else if(pred_hist.front().wasCall && pred_hist.front().pushedRAS) {
+ } else if (pred_hist.front().wasCall && pred_hist.front().pushedRAS) {
// Was a call but predicated false. Pop RAS here
DPRINTF(Branch, "[tid: %i] Squashing"
" Call [sn:%i] PC: %s Popping RAS\n", tid,