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| author | Andreas Sandberg <Andreas.Sandberg@ARM.com> | 2013-01-07 13:05:42 -0500 |
|---|---|---|
| committer | Andreas Sandberg <Andreas.Sandberg@ARM.com> | 2013-01-07 13:05:42 -0500 |
| commit | 17b47d35e1d0dedca7a3336f1193b1a502bcd78b (patch) | |
| tree | 3b37175b174a2cdad1020ff6dd917f32c1c10907 /src/cpu/quiesce_event.cc | |
| parent | 7eb0fb8b6ebffcb39b61964d4c7387455c262aae (diff) | |
| download | gem5-17b47d35e1d0dedca7a3336f1193b1a502bcd78b.tar.xz | |
arch: Move the ISA object to a separate section
After making the ISA an independent SimObject, it is serialized
automatically by the Python world. Previously, this just resulted in
an empty ISA section. This patch moves the contents of the ISA to that
section and removes the explicit ISA serialization from the thread
contexts, which makes it behave like a normal SimObject during
serialization.
Note: This patch breaks checkpoint backwards compatibility! Use the
cpt_upgrader.py utility to upgrade old checkpoints to the new format.
Diffstat (limited to 'src/cpu/quiesce_event.cc')
0 files changed, 0 insertions, 0 deletions