arch, cpu: Architectural Register structural indexing

Replace the unified register mapping with a structure associating
a class and an index. It is now much easier to know which class of
register the index is referring to. Also, when adding a new class
there is no need to modify existing ones.

Change-Id: I55b3ac80763702aa2cd3ed2cbff0a75ef7620373
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
[ Fix RISCV build issues ]
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/2700

1 files changed, 2 insertions, 0 deletions

diff --git a/src/cpu/reg_class.cc b/src/cpu/reg_class.cc
index 1805eae13..75be4679d 100644
--- a/src/cpu/reg_class.cc
+++ b/src/cpu/reg_class.cc
@@ -36,3 +36,5 @@ const char *RegClassStrings[] = {
     "CCRegClass",
     "MiscRegClass"
 };
+
+const RegId RegId::zeroReg = RegId(IntRegClass, TheISA::ZeroReg);