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authorGeoffrey Blake <geoffrey.blake@arm.com>2012-01-31 07:46:03 -0800
committerGeoffrey Blake <geoffrey.blake@arm.com>2012-01-31 07:46:03 -0800
commitaf6aaf258171027af8d3cf0ef86dddff501a3ccb (patch)
tree3473845b7217b48dcf43460f0a90ca655a7018ed /src/cpu/simple/BaseSimpleCPU.py
parentade53def9252a36a39b2c4bd61196355906f0505 (diff)
downloadgem5-af6aaf258171027af8d3cf0ef86dddff501a3ccb.tar.xz
CheckerCPU: Re-factor CheckerCPU to be compatible with current gem5
Brings the CheckerCPU back to life to allow FS and SE checking of the O3CPU. These changes have only been tested with the ARM ISA. Other ISAs potentially require modification.
Diffstat (limited to 'src/cpu/simple/BaseSimpleCPU.py')
-rw-r--r--src/cpu/simple/BaseSimpleCPU.py9
1 files changed, 9 insertions, 0 deletions
diff --git a/src/cpu/simple/BaseSimpleCPU.py b/src/cpu/simple/BaseSimpleCPU.py
index 9f528bc20..ea2c642e6 100644
--- a/src/cpu/simple/BaseSimpleCPU.py
+++ b/src/cpu/simple/BaseSimpleCPU.py
@@ -26,9 +26,18 @@
#
# Authors: Gabe Black
+from m5.defines import buildEnv
from m5.params import *
from BaseCPU import BaseCPU
+if buildEnv['USE_CHECKER']:
+ from DummyChecker import DummyChecker
+
class BaseSimpleCPU(BaseCPU):
type = 'BaseSimpleCPU'
abstract = True
+
+ if buildEnv['USE_CHECKER']:
+ checker = Param.BaseCPU(DummyChecker(), "checker")
+ checker.itb = BaseCPU.itb
+ checker.dtb = BaseCPU.dtb