diff options
author | Andreas Sandberg <Andreas.Sandberg@ARM.com> | 2013-01-07 13:05:52 -0500 |
---|---|---|
committer | Andreas Sandberg <Andreas.Sandberg@ARM.com> | 2013-01-07 13:05:52 -0500 |
commit | 009970f59b86eac6c9a35eeb175dd9e3a3079d13 (patch) | |
tree | 03119f68fd1e03ff753954b63722b916b39f6737 /src/cpu/simple/atomic.cc | |
parent | 5fb00e1df6b2b7d9db472d0c25765263ed1b839f (diff) | |
download | gem5-009970f59b86eac6c9a35eeb175dd9e3a3079d13.tar.xz |
cpu: Unify the serialization code for all of the CPU models
Cleanup the serialization code for the simple CPUs and the O3 CPU. The
CPU-specific code has been replaced with a (un)serializeThread that
serializes the thread state / context of a specific thread. Assuming
that the thread state class uses the CPU-specific thread state uses
the base thread state serialization code, this allows us to restore a
checkpoint with any of the CPU models.
Diffstat (limited to 'src/cpu/simple/atomic.cc')
-rw-r--r-- | src/cpu/simple/atomic.cc | 28 |
1 files changed, 12 insertions, 16 deletions
diff --git a/src/cpu/simple/atomic.cc b/src/cpu/simple/atomic.cc index 036abdcdb..7255469a0 100644 --- a/src/cpu/simple/atomic.cc +++ b/src/cpu/simple/atomic.cc @@ -132,7 +132,7 @@ unsigned int AtomicSimpleCPU::drain(DrainManager *dm) { assert(!drain_manager); - if (_status == SwitchedOut) + if (switchedOut()) return 0; if (!isDrained()) { @@ -151,8 +151,9 @@ AtomicSimpleCPU::drain(DrainManager *dm) void AtomicSimpleCPU::drainResume() { + assert(!tickEvent.scheduled()); assert(!drain_manager); - if (_status == Idle || _status == SwitchedOut) + if (switchedOut()) return; DPRINTF(SimpleCPU, "Resume\n"); @@ -161,9 +162,16 @@ AtomicSimpleCPU::drainResume() "'atomic' mode.\n"); } - assert(!tickEvent.scheduled()); - if (thread->status() == ThreadContext::Active) + assert(!threadContexts.empty()); + if (threadContexts.size() > 1) + fatal("The atomic CPU only supports one thread.\n"); + + if (thread->status() == ThreadContext::Active) { schedule(tickEvent, nextCycle()); + _status = BaseSimpleCPU::Running; + } else { + _status = BaseSimpleCPU::Idle; + } system->totalNumInsts = 0; } @@ -194,8 +202,6 @@ AtomicSimpleCPU::switchOut() assert(!tickEvent.scheduled()); assert(_status == BaseSimpleCPU::Running || _status == Idle); assert(isDrained()); - - _status = SwitchedOut; } @@ -207,16 +213,6 @@ AtomicSimpleCPU::takeOverFrom(BaseCPU *oldCPU) // The tick event should have been descheduled by drain() assert(!tickEvent.scheduled()); - assert(!threadContexts.empty()); - if (threadContexts.size() > 1) - fatal("The atomic CPU only supports one thread.\n"); - - // If the ThreadContext is active, mark the CPU as running. - if (thread->status() == ThreadContext::Active) - _status = BaseSimpleCPU::Running; - else - _status = Idle; - ifetch_req.setThreadContext(_cpuId, 0); // Add thread ID if we add MT data_read_req.setThreadContext(_cpuId, 0); // Add thread ID here too data_write_req.setThreadContext(_cpuId, 0); // Add thread ID here too |