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authorGabe Black <gblack@eecs.umich.edu>2006-11-01 19:00:59 -0500
committerGabe Black <gblack@eecs.umich.edu>2006-11-01 19:00:59 -0500
commitb565660c42cbf8f9ec9442cd6c0b7d488c7816af (patch)
treeaa977395b10e164190efdd5106da54a57bc23b44 /src/cpu/simple/atomic.cc
parent8dbab9f701150cf93d33f2a21d6b556507f3d617 (diff)
parent9ef8bf74c7ab3d34889e804cb4b1e365da090d0b (diff)
downloadgem5-b565660c42cbf8f9ec9442cd6c0b7d488c7816af.tar.xz
Merge zizzer.eecs.umich.edu:/bk/newmem/
into zeep.eecs.umich.edu:/home/gblack/m5/newmemmemops --HG-- extra : convert_revision : c2f7398a0d14dd11108579bb243ada7420285a22
Diffstat (limited to 'src/cpu/simple/atomic.cc')
-rw-r--r--src/cpu/simple/atomic.cc12
1 files changed, 0 insertions, 12 deletions
diff --git a/src/cpu/simple/atomic.cc b/src/cpu/simple/atomic.cc
index 1e12aadef..72249be41 100644
--- a/src/cpu/simple/atomic.cc
+++ b/src/cpu/simple/atomic.cc
@@ -72,15 +72,6 @@ AtomicSimpleCPU::getPort(const std::string &if_name, int idx)
void
AtomicSimpleCPU::init()
{
- //Create Memory Ports (conect them up)
-// Port *mem_dport = mem->getPort("");
-// dcachePort.setPeer(mem_dport);
-// mem_dport->setPeer(&dcachePort);
-
-// Port *mem_iport = mem->getPort("");
-// icachePort.setPeer(mem_iport);
-// mem_iport->setPeer(&icachePort);
-
BaseCPU::init();
#if FULL_SYSTEM
for (int i = 0; i < threadContexts.size(); ++i) {
@@ -508,7 +499,6 @@ BEGIN_DECLARE_SIM_OBJECT_PARAMS(AtomicSimpleCPU)
Param<Counter> max_loads_any_thread;
Param<Counter> max_loads_all_threads;
Param<Tick> progress_interval;
- SimObjectParam<MemObject *> mem;
SimObjectParam<System *> system;
Param<int> cpu_id;
@@ -541,7 +531,6 @@ BEGIN_INIT_SIM_OBJECT_PARAMS(AtomicSimpleCPU)
INIT_PARAM(max_loads_all_threads,
"terminate when all threads have reached this load count"),
INIT_PARAM(progress_interval, "Progress interval"),
- INIT_PARAM(mem, "memory"),
INIT_PARAM(system, "system object"),
INIT_PARAM(cpu_id, "processor ID"),
@@ -579,7 +568,6 @@ CREATE_SIM_OBJECT(AtomicSimpleCPU)
params->functionTraceStart = function_trace_start;
params->width = width;
params->simulate_stalls = simulate_stalls;
- params->mem = mem;
params->system = system;
params->cpu_id = cpu_id;