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authorLisa Hsu <hsul@eecs.umich.edu>2006-10-23 18:43:56 -0400
committerLisa Hsu <hsul@eecs.umich.edu>2006-10-23 18:43:56 -0400
commit0a2387f38c6887f688144a18e0d7ff50e80bd04c (patch)
tree3cd5ab50febb41f5b7464d08172cae047dbdff08 /src/cpu/simple/atomic.cc
parent049f8d53a92590233db82937aecd5ba2cdbe7d0d (diff)
downloadgem5-0a2387f38c6887f688144a18e0d7ff50e80bd04c.tar.xz
make this parallel to the other cpu types so that resume works correctly.
--HG-- extra : convert_revision : 3c165af27ea0e6c7f2a17819c1717d8900f54cc1
Diffstat (limited to 'src/cpu/simple/atomic.cc')
-rw-r--r--src/cpu/simple/atomic.cc11
1 files changed, 7 insertions, 4 deletions
diff --git a/src/cpu/simple/atomic.cc b/src/cpu/simple/atomic.cc
index fe421ae6c..87ecafd69 100644
--- a/src/cpu/simple/atomic.cc
+++ b/src/cpu/simple/atomic.cc
@@ -182,11 +182,14 @@ AtomicSimpleCPU::unserialize(Checkpoint *cp, const string &section)
void
AtomicSimpleCPU::resume()
{
- changeState(SimObject::Running);
- if (thread->status() == ThreadContext::Active) {
+ if (_status != SwitchedOut && _status != Idle) {
assert(system->getMemoryMode() == System::Atomic);
- if (!tickEvent.scheduled())
- tickEvent.schedule(curTick);
+
+ changeState(SimObject::Running);
+ if (thread->status() == ThreadContext::Active) {
+ if (!tickEvent.scheduled())
+ tickEvent.schedule(curTick);
+ }
}
}