Merge ktlim@zizzer:/bk/newmem

into  zamp.eecs.umich.edu:/z/ktlim2/clean/newmem-merge

--HG--
extra : convert_revision : 0756f7f1f63fae472e0ef1d20e9eb38e56de78c8

1 files changed, 5 insertions, 6 deletions

diff --git a/src/cpu/simple/atomic.cc b/src/cpu/simple/atomic.cc
index 7be74e97e..be6f421b3 100644
--- a/src/cpu/simple/atomic.cc
+++ b/src/cpu/simple/atomic.cc
@@ -407,15 +407,14 @@ AtomicSimpleCPU::tick()
             postExecute();
 
             if (simulate_stalls) {
-                // This calculation assumes that the icache and dcache
-                // access latencies are always a multiple of the CPU's
-                // cycle time.  If not, the next tick event may get
-                // scheduled at a non-integer multiple of the CPU
-                // cycle time.
                 Tick icache_stall = icache_latency - cycles(1);
                 Tick dcache_stall =
                     dcache_access ? dcache_latency - cycles(1) : 0;
-                latency += icache_stall + dcache_stall;
+                Tick stall_cycles = (icache_stall + dcache_stall) / cycles(1);
+                if (cycles(stall_cycles) < (icache_stall + dcache_stall))
+                    latency += cycles(stall_cycles+1);
+                else
+                    latency += cycles(stall_cycles);
             }
 
         }