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authorRon Dreslinski <rdreslin@umich.edu>2006-11-14 01:10:36 -0500
committerRon Dreslinski <rdreslin@umich.edu>2006-11-14 01:10:36 -0500
commit7babf6b3a89dffdef108c0d68057eabc491dcc50 (patch)
treeb7af0ebd30215c72d16cc44d81e7dcc86d036b3e /src/cpu/simple/atomic.cc
parent903a61871438fc872a4762e4d782264cbbd02154 (diff)
downloadgem5-7babf6b3a89dffdef108c0d68057eabc491dcc50.tar.xz
Make cpu's capable of having a phase shift
--HG-- extra : convert_revision : 7f082ba5c1cd2445aec731950c31a877aac23a75
Diffstat (limited to 'src/cpu/simple/atomic.cc')
-rw-r--r--src/cpu/simple/atomic.cc3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/cpu/simple/atomic.cc b/src/cpu/simple/atomic.cc
index 325260609..133b5500b 100644
--- a/src/cpu/simple/atomic.cc
+++ b/src/cpu/simple/atomic.cc
@@ -520,6 +520,7 @@ BEGIN_DECLARE_SIM_OBJECT_PARAMS(AtomicSimpleCPU)
#endif // FULL_SYSTEM
Param<int> clock;
+ Param<int> phase;
Param<bool> defer_registration;
Param<int> width;
@@ -555,6 +556,7 @@ BEGIN_INIT_SIM_OBJECT_PARAMS(AtomicSimpleCPU)
#endif // FULL_SYSTEM
INIT_PARAM(clock, "clock speed"),
+ INIT_PARAM_DFLT(phase, "clock phase", 0),
INIT_PARAM(defer_registration, "defer system registration (for sampling)"),
INIT_PARAM(width, "cpu width"),
INIT_PARAM(function_trace, "Enable function trace"),
@@ -575,6 +577,7 @@ CREATE_SIM_OBJECT(AtomicSimpleCPU)
params->max_loads_all_threads = max_loads_all_threads;
params->progress_interval = progress_interval;
params->deferRegistration = defer_registration;
+ params->phase = phase;
params->clock = clock;
params->functionTrace = function_trace;
params->functionTraceStart = function_trace_start;