diff options
author | Steve Reinhardt <steve.reinhardt@amd.com> | 2016-02-06 17:21:19 -0800 |
---|---|---|
committer | Steve Reinhardt <steve.reinhardt@amd.com> | 2016-02-06 17:21:19 -0800 |
commit | 5592798865ece858bab2b444bc782d19121e2566 (patch) | |
tree | 80803048c903c424ed9f1200b5dc1a29ed3ff6b8 /src/cpu/simple/atomic.cc | |
parent | dc8018a5c3482008232e6faaa2d96cf20aed7485 (diff) | |
download | gem5-5592798865ece858bab2b444bc782d19121e2566.tar.xz |
style: fix missing spaces in control statements
Result of running 'hg m5style --skip-all --fix-control -a'.
Diffstat (limited to 'src/cpu/simple/atomic.cc')
-rw-r--r-- | src/cpu/simple/atomic.cc | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/src/cpu/simple/atomic.cc b/src/cpu/simple/atomic.cc index 4afd019d0..1eb219483 100644 --- a/src/cpu/simple/atomic.cc +++ b/src/cpu/simple/atomic.cc @@ -139,7 +139,7 @@ AtomicSimpleCPU::threadSnoop(PacketPtr pkt, ThreadID sender) for (ThreadID tid = 0; tid < numThreads; tid++) { if (tid != sender) { - if(getCpuAddrMonitor(tid)->doMonitor(pkt)) { + if (getCpuAddrMonitor(tid)->doMonitor(pkt)) { wakeup(tid); } @@ -312,7 +312,7 @@ AtomicSimpleCPU::AtomicCPUDPort::recvFunctionalSnoop(PacketPtr pkt) // X86 ISA: Snooping an invalidation for monitor/mwait AtomicSimpleCPU *cpu = (AtomicSimpleCPU *)(&owner); for (ThreadID tid = 0; tid < cpu->numThreads; tid++) { - if(cpu->getCpuAddrMonitor(tid)->doMonitor(pkt)) { + if (cpu->getCpuAddrMonitor(tid)->doMonitor(pkt)) { cpu->wakeup(tid); } } @@ -450,13 +450,13 @@ AtomicSimpleCPU::writeMem(uint8_t *data, unsigned size, //across a cache line boundary. Addr secondAddr = roundDown(addr + size - 1, cacheLineSize()); - if(secondAddr > addr) + if (secondAddr > addr) size = secondAddr - addr; dcache_latency = 0; req->taskId(taskId()); - while(1) { + while (1) { req->setVirt(0, addr, size, flags, dataMasterId(), thread->pcState().instAddr()); // translate to physical address @@ -600,7 +600,7 @@ AtomicSimpleCPU::tick() // like the I cache. It should be flushed, and when that works // this code should be uncommented. //Fetch more instruction memory if necessary - //if(decoder.needMoreBytes()) + //if (decoder.needMoreBytes()) //{ icache_access = true; Packet ifetch_pkt = Packet(&ifetch_req, MemCmd::ReadReq); @@ -657,7 +657,7 @@ AtomicSimpleCPU::tick() } } - if(fault != NoFault || !t_info.stayAtPC) + if (fault != NoFault || !t_info.stayAtPC) advancePC(fault); } |