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authorMitch Hayenga <mitch.hayenga@arm.com>2015-09-30 11:14:19 -0500
committerMitch Hayenga <mitch.hayenga@arm.com>2015-09-30 11:14:19 -0500
commit582a0148b441fe9f4a6f977094c5ce6bf7ab6313 (patch)
treedc2a54ead2b5f7b8e521cfb49b28dc054088b17a /src/cpu/simple/atomic.hh
parent52d521e4337995d417b6f7b68644959edcc0c6b4 (diff)
downloadgem5-582a0148b441fe9f4a6f977094c5ce6bf7ab6313.tar.xz
config,cpu: Add SMT support to Atomic and Timing CPUs
Adds SMT support to the "simple" CPU models so that they can be used with other SMT-supported CPUs. Example usage: this enables the TimingSimpleCPU to be used to warmup caches before swapping to detailed mode with the in-order or out-of-order based CPU models.
Diffstat (limited to 'src/cpu/simple/atomic.hh')
-rw-r--r--src/cpu/simple/atomic.hh9
1 files changed, 6 insertions, 3 deletions
diff --git a/src/cpu/simple/atomic.hh b/src/cpu/simple/atomic.hh
index 3f587e671..76ee9f897 100644
--- a/src/cpu/simple/atomic.hh
+++ b/src/cpu/simple/atomic.hh
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2012-2013 ARM Limited
+ * Copyright (c) 2012-2013,2015 ARM Limited
* All rights reserved.
*
* The license below extends only to copyright in the software and shall
@@ -44,6 +44,7 @@
#define __CPU_SIMPLE_ATOMIC_HH__
#include "cpu/simple/base.hh"
+#include "cpu/simple/exec_context.hh"
#include "params/AtomicSimpleCPU.hh"
#include "sim/probe/probe.hh"
@@ -96,9 +97,11 @@ class AtomicSimpleCPU : public BaseSimpleCPU
* </ul>
*/
bool isDrained() {
- return microPC() == 0 &&
+ SimpleExecContext &t_info = *threadInfo[curThread];
+
+ return t_info.thread->microPC() == 0 &&
!locked &&
- !stayAtPC;
+ !t_info.stayAtPC;
}
/**