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| author | Nathan Binkert <nate@binkert.org> | 2007-08-12 09:56:37 -0700 |
|---|---|---|
| committer | Nathan Binkert <nate@binkert.org> | 2007-08-12 09:56:37 -0700 |
| commit | 64295b800fd67e9b9bb3eee0131511a71ddf1fdb (patch) | |
| tree | ed1c759f11384dd2c263b43d7842be2922c5c39d /src/cpu/simple/atomic.hh | |
| parent | b92594dd90f54a892771989a8164148e6647c9ab (diff) | |
| parent | ec4000e0e284834df0eb1db792074a1b11f21cc8 (diff) | |
| download | gem5-64295b800fd67e9b9bb3eee0131511a71ddf1fdb.tar.xz | |
merge
--HG--
extra : convert_revision : 5866eaa4008c4fa5da7fbb443132b8326955f71d
Diffstat (limited to 'src/cpu/simple/atomic.hh')
| -rw-r--r-- | src/cpu/simple/atomic.hh | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/cpu/simple/atomic.hh b/src/cpu/simple/atomic.hh index 28e883b24..96429e5b1 100644 --- a/src/cpu/simple/atomic.hh +++ b/src/cpu/simple/atomic.hh @@ -121,6 +121,8 @@ class AtomicSimpleCPU : public BaseSimpleCPU }; DcachePort dcachePort; + CpuPort physmemPort; + bool hasPhysMemPort; Request ifetch_req; Request data_read_req; Request data_write_req; @@ -128,6 +130,8 @@ class AtomicSimpleCPU : public BaseSimpleCPU bool dcache_access; Tick dcache_latency; + Range<Addr> physMemAddr; + public: virtual Port *getPort(const std::string &if_name, int idx = -1); |