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authorNathan Binkert <nate@binkert.org>2008-06-18 10:15:21 -0700
committerNathan Binkert <nate@binkert.org>2008-06-18 10:15:21 -0700
commit67a33eed40f0a551fdf9bf1059928cda1c2d7fdb (patch)
tree0b7cc05da8cf12189d998b8e67a729a21cc919b5 /src/cpu/simple/atomic.hh
parentf24f2c57b6cd8dd45681c08d1ddfbd40a2914987 (diff)
downloadgem5-67a33eed40f0a551fdf9bf1059928cda1c2d7fdb.tar.xz
AtomicSimpleCPU: Separate data stalls from instruction stalls.
Separate simulation of icache stalls and dat stalls.
Diffstat (limited to 'src/cpu/simple/atomic.hh')
-rw-r--r--src/cpu/simple/atomic.hh6
1 files changed, 4 insertions, 2 deletions
diff --git a/src/cpu/simple/atomic.hh b/src/cpu/simple/atomic.hh
index 19bc0e13b..ccea15073 100644
--- a/src/cpu/simple/atomic.hh
+++ b/src/cpu/simple/atomic.hh
@@ -39,7 +39,8 @@ class AtomicSimpleCPU : public BaseSimpleCPU
struct Params : public BaseSimpleCPU::Params {
int width;
- bool simulate_stalls;
+ bool simulate_data_stalls;
+ bool simulate_inst_stalls;
};
AtomicSimpleCPU(Params *params);
@@ -74,7 +75,8 @@ class AtomicSimpleCPU : public BaseSimpleCPU
TickEvent tickEvent;
const int width;
- const bool simulate_stalls;
+ const bool simulate_data_stalls;
+ const bool simulate_inst_stalls;
// main simulation loop (one cycle)
void tick();