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authorKorey Sewell <ksewell@umich.edu>2006-06-11 14:38:14 -0400
committerKorey Sewell <ksewell@umich.edu>2006-06-11 14:38:14 -0400
commit6a0c5b9fad3fa437fbea968f2ddeaad31ea51129 (patch)
treebf19f848eb6c1f972ee1af7e00d4dcb2919ff9cd /src/cpu/simple/base.cc
parent6de5d73a999240f92f050393bb10028968275835 (diff)
downloadgem5-6a0c5b9fad3fa437fbea968f2ddeaad31ea51129.tar.xz
Edit Fetch DPRINT in simple CPU
src/arch/mips/isa/formats/mt.isa: change copyright to 2006 src/cpu/simple/base.cc: Only DPRINT NNPC if we are not using ALPHA src/cpu/static_inst.hh: Take Out MIPS Specific functions ... --HG-- extra : convert_revision : 7a69e80cd1564fa3b778b9dade0e9fe3cef94e64
Diffstat (limited to 'src/cpu/simple/base.cc')
-rw-r--r--src/cpu/simple/base.cc6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/cpu/simple/base.cc b/src/cpu/simple/base.cc
index c1ecf3967..b854dfab2 100644
--- a/src/cpu/simple/base.cc
+++ b/src/cpu/simple/base.cc
@@ -26,6 +26,7 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Steve Reinhardt
+ * Korey Sewell
*/
#include "arch/utility.hh"
@@ -358,8 +359,13 @@ Fault
BaseSimpleCPU::setupFetchRequest(Request *req)
{
// set up memory request for instruction fetch
+#if THE_ISA == ALPHA_ISA
+ DPRINTF(Fetch,"Fetch: PC:%08p NPC:%08p",thread->readPC(),
+ thread->readNextPC());
+#else
DPRINTF(Fetch,"Fetch: PC:%08p NPC:%08p NNPC:%08p\n",thread->readPC(),
thread->readNextPC(),thread->readNextNPC());
+#endif
req->setVirt(0, thread->readPC() & ~3, sizeof(MachInst),
(FULL_SYSTEM && (thread->readPC() & 1)) ? PHYSICAL : 0,