Change ExecContext to ThreadContext. This is being renamed to differentiate between the interface used objects outside of the CPU, and the interface used by the ISA. ThreadContext is used by objects outside of the CPU and is specifically defined in thread_context.hh. ExecContext is more implicit, and is defined by files such as base_dyn_inst.hh or cpu/simple/base.hh.

Further renames/reorganization will be coming shortly; what is currently CPUExecContext (the old ExecContext from m5) will be renamed to SimpleThread or something similar.

src/arch/alpha/arguments.cc:
src/arch/alpha/arguments.hh:
src/arch/alpha/ev5.cc:
src/arch/alpha/faults.cc:
src/arch/alpha/faults.hh:
src/arch/alpha/freebsd/system.cc:
src/arch/alpha/freebsd/system.hh:
src/arch/alpha/isa/branch.isa:
src/arch/alpha/isa/decoder.isa:
src/arch/alpha/isa/main.isa:
src/arch/alpha/linux/process.cc:
src/arch/alpha/linux/system.cc:
src/arch/alpha/linux/system.hh:
src/arch/alpha/linux/threadinfo.hh:
src/arch/alpha/process.cc:
src/arch/alpha/regfile.hh:
src/arch/alpha/stacktrace.cc:
src/arch/alpha/stacktrace.hh:
src/arch/alpha/tlb.cc:
src/arch/alpha/tlb.hh:
src/arch/alpha/tru64/process.cc:
src/arch/alpha/tru64/system.cc:
src/arch/alpha/tru64/system.hh:
src/arch/alpha/utility.hh:
src/arch/alpha/vtophys.cc:
src/arch/alpha/vtophys.hh:
src/arch/mips/faults.cc:
src/arch/mips/faults.hh:
src/arch/mips/isa_traits.cc:
src/arch/mips/isa_traits.hh:
src/arch/mips/linux/process.cc:
src/arch/mips/process.cc:
src/arch/mips/regfile/float_regfile.hh:
src/arch/mips/regfile/int_regfile.hh:
src/arch/mips/regfile/misc_regfile.hh:
src/arch/mips/regfile/regfile.hh:
src/arch/mips/stacktrace.hh:
src/arch/sparc/faults.cc:
src/arch/sparc/faults.hh:
src/arch/sparc/isa_traits.hh:
src/arch/sparc/linux/process.cc:
src/arch/sparc/linux/process.hh:
src/arch/sparc/process.cc:
src/arch/sparc/regfile.hh:
src/arch/sparc/solaris/process.cc:
src/arch/sparc/stacktrace.hh:
src/arch/sparc/ua2005.cc:
src/arch/sparc/utility.hh:
src/arch/sparc/vtophys.cc:
src/arch/sparc/vtophys.hh:
src/base/remote_gdb.cc:
src/base/remote_gdb.hh:
src/cpu/base.cc:
src/cpu/base.hh:
src/cpu/base_dyn_inst.hh:
src/cpu/checker/cpu.cc:
src/cpu/checker/cpu.hh:
src/cpu/checker/exec_context.hh:
src/cpu/cpu_exec_context.cc:
src/cpu/cpu_exec_context.hh:
src/cpu/cpuevent.cc:
src/cpu/cpuevent.hh:
src/cpu/exetrace.hh:
src/cpu/intr_control.cc:
src/cpu/memtest/memtest.hh:
src/cpu/o3/alpha_cpu.hh:
src/cpu/o3/alpha_cpu_impl.hh:
src/cpu/o3/alpha_dyn_inst_impl.hh:
src/cpu/o3/commit.hh:
src/cpu/o3/commit_impl.hh:
src/cpu/o3/cpu.cc:
src/cpu/o3/cpu.hh:
src/cpu/o3/fetch_impl.hh:
src/cpu/o3/regfile.hh:
src/cpu/o3/thread_state.hh:
src/cpu/ozone/back_end.hh:
src/cpu/ozone/cpu.hh:
src/cpu/ozone/cpu_impl.hh:
src/cpu/ozone/front_end.hh:
src/cpu/ozone/front_end_impl.hh:
src/cpu/ozone/inorder_back_end.hh:
src/cpu/ozone/lw_back_end.hh:
src/cpu/ozone/lw_back_end_impl.hh:
src/cpu/ozone/lw_lsq.hh:
src/cpu/ozone/lw_lsq_impl.hh:
src/cpu/ozone/thread_state.hh:
src/cpu/pc_event.cc:
src/cpu/pc_event.hh:
src/cpu/profile.cc:
src/cpu/profile.hh:
src/cpu/quiesce_event.cc:
src/cpu/quiesce_event.hh:
src/cpu/simple/atomic.cc:
src/cpu/simple/base.cc:
src/cpu/simple/base.hh:
src/cpu/simple/timing.cc:
src/cpu/static_inst.cc:
src/cpu/static_inst.hh:
src/cpu/thread_state.hh:
src/dev/alpha_console.cc:
src/dev/ns_gige.cc:
src/dev/sinic.cc:
src/dev/tsunami_cchip.cc:
src/kern/kernel_stats.cc:
src/kern/kernel_stats.hh:
src/kern/linux/events.cc:
src/kern/linux/events.hh:
src/kern/system_events.cc:
src/kern/system_events.hh:
src/kern/tru64/dump_mbuf.cc:
src/kern/tru64/tru64.hh:
src/kern/tru64/tru64_events.cc:
src/kern/tru64/tru64_events.hh:
src/mem/vport.cc:
src/mem/vport.hh:
src/sim/faults.cc:
src/sim/faults.hh:
src/sim/process.cc:
src/sim/process.hh:
src/sim/pseudo_inst.cc:
src/sim/pseudo_inst.hh:
src/sim/syscall_emul.cc:
src/sim/syscall_emul.hh:
src/sim/system.cc:
src/cpu/thread_context.hh:
src/sim/system.hh:
src/sim/vptr.hh:
    Change ExecContext to ThreadContext.

--HG--
rename : src/cpu/exec_context.hh => src/cpu/thread_context.hh
extra : convert_revision : 108bb97d15a114a565a2a6a23faa554f4e2fd77e

1 files changed, 12 insertions, 12 deletions

diff --git a/src/cpu/simple/base.cc b/src/cpu/simple/base.cc
index 12fb4f165..d36aa93a2 100644
--- a/src/cpu/simple/base.cc
+++ b/src/cpu/simple/base.cc
@@ -39,7 +39,7 @@
 #include "base/trace.hh"
 #include "cpu/base.hh"
 #include "cpu/cpu_exec_context.hh"
-#include "cpu/exec_context.hh"
+#include "cpu/thread_context.hh"
 #include "cpu/exetrace.hh"
 #include "cpu/profile.hh"
 #include "cpu/sampler/sampler.hh"
@@ -79,9 +79,9 @@ BaseSimpleCPU::BaseSimpleCPU(Params *p)
             /* asid */ 0, mem);
 #endif // !FULL_SYSTEM
 
-    cpuXC->setStatus(ExecContext::Suspended);
+    cpuXC->setStatus(ThreadContext::Suspended);
 
-    xcProxy = cpuXC->getProxy();
+    tc = cpuXC->getTC();
 
     numInst = 0;
     startNumInst = 0;
@@ -90,7 +90,7 @@ BaseSimpleCPU::BaseSimpleCPU(Params *p)
     lastIcacheStall = 0;
     lastDcacheStall = 0;
 
-    execContexts.push_back(xcProxy);
+    threadContexts.push_back(tc);
 }
 
 BaseSimpleCPU::~BaseSimpleCPU()
@@ -290,7 +290,7 @@ BaseSimpleCPU::copy(Addr dest)
 Addr
 BaseSimpleCPU::dbg_vtophys(Addr addr)
 {
-    return vtophys(xcProxy, addr);
+    return vtophys(tc, addr);
 }
 #endif // FULL_SYSTEM
 
@@ -300,7 +300,7 @@ BaseSimpleCPU::post_interrupt(int int_num, int index)
 {
     BaseCPU::post_interrupt(int_num, index);
 
-    if (cpuXC->status() == ExecContext::Suspended) {
+    if (cpuXC->status() == ThreadContext::Suspended) {
                 DPRINTF(IPI,"Suspended Processor awoke\n");
         cpuXC->activate();
     }
@@ -344,7 +344,7 @@ BaseSimpleCPU::checkForInterrupts()
             cpuXC->setMiscReg(IPR_ISR, summary);
             cpuXC->setMiscReg(IPR_INTID, ipl);
 
-            Fault(new InterruptFault)->invoke(xcProxy);
+            Fault(new InterruptFault)->invoke(tc);
 
             DPRINTF(Flow, "Interrupt! IPLR=%d ipl=%d summary=%x\n",
                     cpuXC->readMiscReg(IPR_IPLR), ipl, summary);
@@ -393,7 +393,7 @@ BaseSimpleCPU::preExecute()
     inst = gtoh(inst);
     curStaticInst = StaticInst::decode(makeExtMI(inst, cpuXC->readPC()));
 
-    traceData = Trace::getInstRecord(curTick, xcProxy, this, curStaticInst,
+    traceData = Trace::getInstRecord(curTick, tc, this, curStaticInst,
                                      cpuXC->readPC());
 
     DPRINTF(Decode,"Decode: Decoded %s instruction (opcode: 0x%x): 0x%x\n",
@@ -411,14 +411,14 @@ BaseSimpleCPU::postExecute()
 #if FULL_SYSTEM
     if (system->kernelBinning->fnbin) {
         assert(cpuXC->getKernelStats());
-        system->kernelBinning->execute(xcProxy, inst);
+        system->kernelBinning->execute(tc, inst);
     }
 
     if (cpuXC->profile) {
         bool usermode =
             (cpuXC->readMiscReg(AlphaISA::IPR_DTB_CM) & 0x18) != 0;
         cpuXC->profilePC = usermode ? 1 : cpuXC->readPC();
-        ProfileNode *node = cpuXC->profile->consume(xcProxy, inst);
+        ProfileNode *node = cpuXC->profile->consume(tc, inst);
         if (node)
             cpuXC->profileNode = node;
     }
@@ -446,7 +446,7 @@ BaseSimpleCPU::advancePC(Fault fault)
 {
     if (fault != NoFault) {
 #if FULL_SYSTEM
-        fault->invoke(xcProxy);
+        fault->invoke(tc);
 #else // !FULL_SYSTEM
         fatal("fault (%s) detected @ PC %08p", fault->name(), cpuXC->readPC());
 #endif // FULL_SYSTEM
@@ -467,7 +467,7 @@ BaseSimpleCPU::advancePC(Fault fault)
     Addr oldpc;
     do {
         oldpc = cpuXC->readPC();
-        system->pcEventQueue.service(xcProxy);
+        system->pcEventQueue.service(tc);
     } while (oldpc != cpuXC->readPC());
 #endif
 }