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authorGabe Black <gblack@eecs.umich.edu>2007-03-15 02:47:42 +0000
committerGabe Black <gblack@eecs.umich.edu>2007-03-15 02:47:42 +0000
commita2b56088fb4d12aee73ecfeaba88cfa46f98567e (patch)
tree7c6787e2757e9e5d047a3b6cec1b71b4eef915f1 /src/cpu/simple/base.cc
parentce18d900a17cdda2cc041b51c56e6c84fb155331 (diff)
downloadgem5-a2b56088fb4d12aee73ecfeaba88cfa46f98567e.tar.xz
Make the predecoder an object with it's own switched header file. Start adding predecoding functionality to x86.
src/arch/SConscript: src/arch/alpha/utility.hh: src/arch/mips/utility.hh: src/arch/sparc/utility.hh: src/cpu/base.hh: src/cpu/o3/fetch.hh: src/cpu/o3/fetch_impl.hh: src/cpu/simple/atomic.cc: src/cpu/simple/base.cc: src/cpu/simple/base.hh: src/cpu/static_inst.hh: src/arch/alpha/predecoder.hh: src/arch/mips/predecoder.hh: src/arch/sparc/predecoder.hh: Make the predecoder an object with it's own switched header file. --HG-- extra : convert_revision : 77206e29089130e86b97164c30022a062699ba86
Diffstat (limited to 'src/cpu/simple/base.cc')
-rw-r--r--src/cpu/simple/base.cc23
1 files changed, 12 insertions, 11 deletions
diff --git a/src/cpu/simple/base.cc b/src/cpu/simple/base.cc
index c27be02bf..2ad328542 100644
--- a/src/cpu/simple/base.cc
+++ b/src/cpu/simple/base.cc
@@ -70,7 +70,7 @@ using namespace std;
using namespace TheISA;
BaseSimpleCPU::BaseSimpleCPU(Params *p)
- : BaseCPU(p), thread(NULL)
+ : BaseCPU(p), thread(NULL), predecoder(NULL)
{
#if FULL_SYSTEM
thread = new SimpleThread(this, 0, p->system, p->itb, p->dtb);
@@ -370,11 +370,16 @@ BaseSimpleCPU::preExecute()
StaticInstPtr instPtr = NULL;
//Predecode, ie bundle up an ExtMachInst
- unsigned int result =
- predecode(extMachInst, thread->readPC(), inst, thread->getTC());
+ //This should go away once the constructor can be set up properly
+ predecoder.setTC(thread->getTC());
+ //If more fetch data is needed, pass it in.
+ if(predecoder.needMoreBytes())
+ predecoder.moreBytes(thread->readPC(), 0, inst);
+ else
+ predecoder.process();
//If an instruction is ready, decode it
- if (result & ExtMIReady)
- instPtr = StaticInst::decode(extMachInst);
+ if (predecoder.extMachInstReady())
+ instPtr = StaticInst::decode(predecoder.getExtMachInst());
//If we decoded an instruction and it's microcoded, start pulling
//out micro ops
@@ -446,9 +451,9 @@ BaseSimpleCPU::advancePC(Fault fault)
fault->invoke(tc);
thread->setMicroPC(0);
thread->setNextMicroPC(1);
- } else {
+ } else if (predecoder.needMoreBytes()) {
//If we're at the last micro op for this instruction
- if (curStaticInst->isLastMicroOp()) {
+ if (curStaticInst && curStaticInst->isLastMicroOp()) {
//We should be working with a macro op
assert(curMacroStaticInst);
//Close out this macro op, and clean up the
@@ -467,13 +472,9 @@ BaseSimpleCPU::advancePC(Fault fault)
} else {
// go to the next instruction
thread->setPC(thread->readNextPC());
-#if ISA_HAS_DELAY_SLOT
thread->setNextPC(thread->readNextNPC());
thread->setNextNPC(thread->readNextNPC() + sizeof(MachInst));
assert(thread->readNextPC() != thread->readNextNPC());
-#else
- thread->setNextPC(thread->readNextPC() + sizeof(MachInst));
-#endif
}
}