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| author | Gabe Black <gblack@eecs.umich.edu> | 2010-06-02 12:58:16 -0500 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2010-06-02 12:58:16 -0500 |
| commit | 05bd3eb4ec3d9fea3dbc46112a47459085d3011c (patch) | |
| tree | 58d50fab58de1e9165bfc28986913811b26b9568 /src/cpu/simple/base.cc | |
| parent | b93ceef5381b7c84b6887b5299ae81ff48ef45c9 (diff) | |
| download | gem5-05bd3eb4ec3d9fea3dbc46112a47459085d3011c.tar.xz | |
ARM: Implement support for the IT instruction and the ITSTATE bits of CPSR.
Diffstat (limited to 'src/cpu/simple/base.cc')
| -rw-r--r-- | src/cpu/simple/base.cc | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/cpu/simple/base.cc b/src/cpu/simple/base.cc index 7a063d9d7..713ffd081 100644 --- a/src/cpu/simple/base.cc +++ b/src/cpu/simple/base.cc @@ -357,10 +357,10 @@ BaseSimpleCPU::checkForInterrupts() Fault interrupt = interrupts->getInterrupt(tc); if (interrupt != NoFault) { - predecoder.reset(); fetchOffset = 0; interrupts->updateIntrInfo(tc); interrupt->invoke(tc); + predecoder.reset(); } } #endif @@ -508,8 +508,8 @@ BaseSimpleCPU::advancePC(Fault fault) fetchOffset = 0; if (fault != NoFault) { curMacroStaticInst = StaticInst::nullStaticInstPtr; - predecoder.reset(); fault->invoke(tc); + predecoder.reset(); } else { //If we're at the last micro op for this instruction if (curStaticInst && curStaticInst->isLastMicroop()) { |