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authorGabe Black <gblack@eecs.umich.edu>2012-05-26 13:44:46 -0700
committerGabe Black <gblack@eecs.umich.edu>2012-05-26 13:44:46 -0700
commit0cba96ba6a5d7a4dab2a63b14149c49dfbfbb3bc (patch)
tree1e4e1372b76ed021060d560c2ee1a474f4b22ef0 /src/cpu/simple/base.hh
parenteae1e97fb002b44a9d8c46df2da1ddc1d0156ce4 (diff)
downloadgem5-0cba96ba6a5d7a4dab2a63b14149c49dfbfbb3bc.tar.xz
CPU: Merge the predecoder and decoder.
These classes are always used together, and merging them will give the ISAs more flexibility in how they cache things and manage the process. --HG-- rename : src/arch/x86/predecoder_tables.cc => src/arch/x86/decoder_tables.cc
Diffstat (limited to 'src/cpu/simple/base.hh')
-rw-r--r--src/cpu/simple/base.hh6
1 files changed, 0 insertions, 6 deletions
diff --git a/src/cpu/simple/base.hh b/src/cpu/simple/base.hh
index 34b039fc0..9bf144326 100644
--- a/src/cpu/simple/base.hh
+++ b/src/cpu/simple/base.hh
@@ -45,8 +45,6 @@
#ifndef __CPU_SIMPLE_BASE_HH__
#define __CPU_SIMPLE_BASE_HH__
-#include "arch/decoder.hh"
-#include "arch/predecoder.hh"
#include "base/statistics.hh"
#include "config/the_isa.hh"
#include "cpu/base.hh"
@@ -71,7 +69,6 @@ namespace TheISA
{
class DTB;
class ITB;
- class Predecoder;
}
namespace Trace {
@@ -154,9 +151,6 @@ class BaseSimpleCPU : public BaseCPU
// current instruction
TheISA::MachInst inst;
- // The predecoder
- TheISA::Predecoder predecoder;
-
StaticInstPtr curStaticInst;
StaticInstPtr curMacroStaticInst;