ARM/O3: store the result of the predicate evaluation in DynInst or Threadstate.

THis allows the CPU to handle predicated-false instructions accordingly.
This particular patch makes loads that are predicated-false to be sent
straight to the commit stage directly, not waiting for return of the data
that was never requested since it was predicated-false.

1 files changed, 3 insertions, 0 deletions

diff --git a/src/cpu/simple/base.hh b/src/cpu/simple/base.hh
index 1265a1f2f..90cb81c0c 100644
--- a/src/cpu/simple/base.hh
+++ b/src/cpu/simple/base.hh
@@ -287,12 +287,15 @@ class BaseSimpleCPU : public BaseCPU
     uint64_t readNextPC() { return thread->readNextPC(); }
     uint64_t readNextMicroPC() { return thread->readNextMicroPC(); }
     uint64_t readNextNPC() { return thread->readNextNPC(); }
+    bool readPredicate() { return thread->readPredicate(); }
 
     void setPC(uint64_t val) { thread->setPC(val); }
     void setMicroPC(uint64_t val) { thread->setMicroPC(val); }
     void setNextPC(uint64_t val) { thread->setNextPC(val); }
     void setNextMicroPC(uint64_t val) { thread->setNextMicroPC(val); }
     void setNextNPC(uint64_t val) { thread->setNextNPC(val); }
+    void setPredicate(bool val)
+    { return thread->setPredicate(val); }
 
     MiscReg readMiscRegNoEffect(int misc_reg)
     {