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author | Steve Reinhardt <stever@eecs.umich.edu> | 2007-06-23 13:26:30 -0700 |
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committer | Steve Reinhardt <stever@eecs.umich.edu> | 2007-06-23 13:26:30 -0700 |
commit | 245b0bd9b94bfaaa188b7e945f91c0e4a9909cbe (patch) | |
tree | 7ca0de263839f60d35cd6cf0ca8c17d94c375209 /src/cpu/simple/base.hh | |
parent | 57ff2604e59647c6afe988767186f13c80c1aa16 (diff) | |
parent | ac19e0c5050219cbb0579a319fa3fab5cf92835d (diff) | |
download | gem5-245b0bd9b94bfaaa188b7e945f91c0e4a9909cbe.tar.xz |
Merge vm1.(none):/home/stever/bk/newmem-head
into vm1.(none):/home/stever/bk/newmem-cache2
src/base/traceflags.py:
Hand merge.
--HG--
extra : convert_revision : 9e7539eeab4220ed7a7237457a8f336f79216924
Diffstat (limited to 'src/cpu/simple/base.hh')
-rw-r--r-- | src/cpu/simple/base.hh | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/src/cpu/simple/base.hh b/src/cpu/simple/base.hh index d221baca8..243167db0 100644 --- a/src/cpu/simple/base.hh +++ b/src/cpu/simple/base.hh @@ -215,6 +215,7 @@ class BaseSimpleCPU : public BaseCPU // need to do this... } + Fault copySrcTranslate(Addr src); Fault copy(Addr dest); @@ -353,6 +354,18 @@ class BaseSimpleCPU : public BaseCPU thread->setStCondFailures(sc_failures); } + MiscReg readRegOtherThread(int regIdx, int tid = -1) + { + panic("Simple CPU models do not support multithreaded " + "register access.\n"); + } + + void setRegOtherThread(int regIdx, const MiscReg &val, int tid = -1) + { + panic("Simple CPU models do not support multithreaded " + "register access.\n"); + } + #if FULL_SYSTEM Fault hwrei() { return thread->hwrei(); } void ev5_trap(Fault fault) { fault->invoke(tc); } |