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authorGabe Black <gblack@eecs.umich.edu>2009-02-25 10:16:15 -0800
committerGabe Black <gblack@eecs.umich.edu>2009-02-25 10:16:15 -0800
commit6ed47e94644f854baa33d1e9f367cc9eebd99abf (patch)
treebc19d10504d3ef0bcaa56b6256cfc732897d1531 /src/cpu/simple/base.hh
parent15940d06b5f6aabbe917a2a8c4cc4bb1cab991e2 (diff)
downloadgem5-6ed47e94644f854baa33d1e9f367cc9eebd99abf.tar.xz
CPU: Implement translateTiming which defers to translateAtomic, and convert the timing simple CPU to use it.
Diffstat (limited to 'src/cpu/simple/base.hh')
-rw-r--r--src/cpu/simple/base.hh4
1 files changed, 3 insertions, 1 deletions
diff --git a/src/cpu/simple/base.hh b/src/cpu/simple/base.hh
index 34d0f5954..d2ccc0ff1 100644
--- a/src/cpu/simple/base.hh
+++ b/src/cpu/simple/base.hh
@@ -125,9 +125,11 @@ class BaseSimpleCPU : public BaseCPU
enum Status {
Idle,
Running,
+ ITBWaitResponse,
IcacheRetry,
IcacheWaitResponse,
IcacheWaitSwitch,
+ DTBWaitResponse,
DcacheRetry,
DcacheWaitResponse,
DcacheWaitSwitch,
@@ -160,7 +162,7 @@ class BaseSimpleCPU : public BaseCPU
bool stayAtPC;
void checkForInterrupts();
- Fault setupFetchRequest(Request *req);
+ void setupFetchRequest(Request *req);
void preExecute();
void postExecute();
void advancePC(Fault fault);