mips import pt. 1

src/arch/mips/SConscript:
    "mips import pt.1".

--HG--
extra : convert_revision : 2e393341938bebf32fb638a209262d074fad4cc1

1 files changed, 13 insertions, 0 deletions

diff --git a/src/cpu/simple/base.hh b/src/cpu/simple/base.hh
index d221baca8..243167db0 100644
--- a/src/cpu/simple/base.hh
+++ b/src/cpu/simple/base.hh
@@ -215,6 +215,7 @@ class BaseSimpleCPU : public BaseCPU
         // need to do this...
     }
 
+
     Fault copySrcTranslate(Addr src);
 
     Fault copy(Addr dest);
@@ -353,6 +354,18 @@ class BaseSimpleCPU : public BaseCPU
         thread->setStCondFailures(sc_failures);
     }
 
+     MiscReg readRegOtherThread(int regIdx, int tid = -1)
+     {
+        panic("Simple CPU models do not support multithreaded "
+              "register access.\n");
+     }
+
+     void setRegOtherThread(int regIdx, const MiscReg &val, int tid = -1)
+     {
+        panic("Simple CPU models do not support multithreaded "
+              "register access.\n");
+     }
+
 #if FULL_SYSTEM
     Fault hwrei() { return thread->hwrei(); }
     void ev5_trap(Fault fault) { fault->invoke(tc); }