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author | Dam Sunwoo <dam.sunwoo@arm.com> | 2014-09-20 17:17:43 -0400 |
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committer | Dam Sunwoo <dam.sunwoo@arm.com> | 2014-09-20 17:17:43 -0400 |
commit | ca3513d63038e562782cd193c00c3892a276bb5d (patch) | |
tree | c8f92b165105989fdb9b9b75d594880157da541f /src/cpu/simple/probes/SConscript | |
parent | 7329c0e20ba2c78f57dd53e90246ccbe3efa158d (diff) | |
download | gem5-ca3513d63038e562782cd193c00c3892a276bb5d.tar.xz |
cpu: use probes infrastructure to do simpoint profiling
Instead of having code embedded in cpu model to do simpoint profiling use
the probes infrastructure to do it.
Diffstat (limited to 'src/cpu/simple/probes/SConscript')
-rw-r--r-- | src/cpu/simple/probes/SConscript | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/src/cpu/simple/probes/SConscript b/src/cpu/simple/probes/SConscript new file mode 100644 index 000000000..648d2052e --- /dev/null +++ b/src/cpu/simple/probes/SConscript @@ -0,0 +1,35 @@ +# -*- mode:python -*- + +# Copyright (c) 2014 ARM Limited +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions are +# met: redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer; +# redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution; +# neither the name of the copyright holders nor the names of its +# contributors may be used to endorse or promote products derived from +# this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# +# Authors: Curtis Dunham + +Import('*') + +if 'AtomicSimpleCPU' in env['CPU_MODELS']: + SimObject('SimPoint.py') + Source('simpoint.cc') |