diff options
author | Gabe Black <gblack@eecs.umich.edu> | 2011-07-02 22:34:58 -0700 |
---|---|---|
committer | Gabe Black <gblack@eecs.umich.edu> | 2011-07-02 22:34:58 -0700 |
commit | 2e7426664a254688e7cf926b902cb8c535a106dd (patch) | |
tree | c40e2511fb778e55c866f96303678cef31d5a449 /src/cpu/simple/timing.cc | |
parent | aade13769fc6c666bb855e0745e042c82f9941d6 (diff) | |
download | gem5-2e7426664a254688e7cf926b902cb8c535a106dd.tar.xz |
ExecContext: Get rid of the now unused read/write templated functions.
Diffstat (limited to 'src/cpu/simple/timing.cc')
-rw-r--r-- | src/cpu/simple/timing.cc | 145 |
1 files changed, 7 insertions, 138 deletions
diff --git a/src/cpu/simple/timing.cc b/src/cpu/simple/timing.cc index 187b38b85..853834d1d 100644 --- a/src/cpu/simple/timing.cc +++ b/src/cpu/simple/timing.cc @@ -479,62 +479,6 @@ TimingSimpleCPU::readBytes(Addr addr, uint8_t *data, return NoFault; } -template <class T> -Fault -TimingSimpleCPU::read(Addr addr, T &data, unsigned flags) -{ - return readBytes(addr, (uint8_t *)&data, sizeof(T), flags); -} - -#ifndef DOXYGEN_SHOULD_SKIP_THIS - -template -Fault -TimingSimpleCPU::read(Addr addr, Twin64_t &data, unsigned flags); - -template -Fault -TimingSimpleCPU::read(Addr addr, Twin32_t &data, unsigned flags); - -template -Fault -TimingSimpleCPU::read(Addr addr, uint64_t &data, unsigned flags); - -template -Fault -TimingSimpleCPU::read(Addr addr, uint32_t &data, unsigned flags); - -template -Fault -TimingSimpleCPU::read(Addr addr, uint16_t &data, unsigned flags); - -template -Fault -TimingSimpleCPU::read(Addr addr, uint8_t &data, unsigned flags); - -#endif //DOXYGEN_SHOULD_SKIP_THIS - -template<> -Fault -TimingSimpleCPU::read(Addr addr, double &data, unsigned flags) -{ - return read(addr, *(uint64_t*)&data, flags); -} - -template<> -Fault -TimingSimpleCPU::read(Addr addr, float &data, unsigned flags) -{ - return read(addr, *(uint32_t*)&data, flags); -} - -template<> -Fault -TimingSimpleCPU::read(Addr addr, int32_t &data, unsigned flags) -{ - return read(addr, (uint32_t&)data, flags); -} - bool TimingSimpleCPU::handleWritePacket() { @@ -556,9 +500,12 @@ TimingSimpleCPU::handleWritePacket() } Fault -TimingSimpleCPU::writeTheseBytes(uint8_t *data, unsigned size, - Addr addr, unsigned flags, uint64_t *res) +TimingSimpleCPU::writeBytes(uint8_t *data, unsigned size, + Addr addr, unsigned flags, uint64_t *res) { + uint8_t *newData = new uint8_t[size]; + memcpy(newData, data, size); + const int asid = 0; const ThreadID tid = 0; const Addr pc = thread->instAddr(); @@ -582,7 +529,7 @@ TimingSimpleCPU::writeTheseBytes(uint8_t *data, unsigned size, req->splitOnVaddr(split_addr, req1, req2); WholeTranslationState *state = - new WholeTranslationState(req, req1, req2, data, res, mode); + new WholeTranslationState(req, req1, req2, newData, res, mode); DataTranslation<TimingSimpleCPU> *trans1 = new DataTranslation<TimingSimpleCPU>(this, state, 0); DataTranslation<TimingSimpleCPU> *trans2 = @@ -592,7 +539,7 @@ TimingSimpleCPU::writeTheseBytes(uint8_t *data, unsigned size, thread->dtb->translateTiming(req2, tc, trans2, mode); } else { WholeTranslationState *state = - new WholeTranslationState(req, data, res, mode); + new WholeTranslationState(req, newData, res, mode); DataTranslation<TimingSimpleCPU> *translation = new DataTranslation<TimingSimpleCPU>(this, state); thread->dtb->translateTiming(req, tc, translation, mode); @@ -602,84 +549,6 @@ TimingSimpleCPU::writeTheseBytes(uint8_t *data, unsigned size, return NoFault; } -Fault -TimingSimpleCPU::writeBytes(uint8_t *data, unsigned size, - Addr addr, unsigned flags, uint64_t *res) -{ - uint8_t *newData = new uint8_t[size]; - memcpy(newData, data, size); - return writeTheseBytes(newData, size, addr, flags, res); -} - -template <class T> -Fault -TimingSimpleCPU::write(T data, Addr addr, unsigned flags, uint64_t *res) -{ - if (traceData) { - traceData->setData(data); - } - T *dataP = (T*) new uint8_t[sizeof(T)]; - *dataP = TheISA::htog(data); - - return writeTheseBytes((uint8_t *)dataP, sizeof(T), addr, flags, res); -} - - -#ifndef DOXYGEN_SHOULD_SKIP_THIS -template -Fault -TimingSimpleCPU::write(Twin32_t data, Addr addr, - unsigned flags, uint64_t *res); - -template -Fault -TimingSimpleCPU::write(Twin64_t data, Addr addr, - unsigned flags, uint64_t *res); - -template -Fault -TimingSimpleCPU::write(uint64_t data, Addr addr, - unsigned flags, uint64_t *res); - -template -Fault -TimingSimpleCPU::write(uint32_t data, Addr addr, - unsigned flags, uint64_t *res); - -template -Fault -TimingSimpleCPU::write(uint16_t data, Addr addr, - unsigned flags, uint64_t *res); - -template -Fault -TimingSimpleCPU::write(uint8_t data, Addr addr, - unsigned flags, uint64_t *res); - -#endif //DOXYGEN_SHOULD_SKIP_THIS - -template<> -Fault -TimingSimpleCPU::write(double data, Addr addr, unsigned flags, uint64_t *res) -{ - return write(*(uint64_t*)&data, addr, flags, res); -} - -template<> -Fault -TimingSimpleCPU::write(float data, Addr addr, unsigned flags, uint64_t *res) -{ - return write(*(uint32_t*)&data, addr, flags, res); -} - - -template<> -Fault -TimingSimpleCPU::write(int32_t data, Addr addr, unsigned flags, uint64_t *res) -{ - return write((uint32_t)data, addr, flags, res); -} - void TimingSimpleCPU::finishTranslation(WholeTranslationState *state) |