summaryrefslogtreecommitdiff
path: root/src/cpu/simple/timing.cc
diff options
context:
space:
mode:
authorKevin Lim <ktlim@umich.edu>2006-07-06 16:06:00 -0400
committerKevin Lim <ktlim@umich.edu>2006-07-06 16:06:00 -0400
commit8ae4f45bc4782b4ab1dc95dbca183e2cd926fc5b (patch)
treead14758015e91929a3095c1f8d9037643e113bde /src/cpu/simple/timing.cc
parentc8a37ce71514de9362640e8cb18c1744f0e2f83b (diff)
downloadgem5-8ae4f45bc4782b4ab1dc95dbca183e2cd926fc5b.tar.xz
Fixes for draining.
src/cpu/simple/timing.cc: Update for changed return values. src/python/m5/__init__.py: Loop in order to make sure all objects are really drained. Objects may become undrained as other objects become drained (e.g. a bus-bridge has a packet, while a bus is empty, and the first drain() will cause the bus-bridge to give the packet to the bus). The only case we know every object is actually drained is if they all return immediately that they are drained. --HG-- extra : convert_revision : 80057a1d6d30381bd0b67b23549bd202f447c5cb
Diffstat (limited to 'src/cpu/simple/timing.cc')
-rw-r--r--src/cpu/simple/timing.cc4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/cpu/simple/timing.cc b/src/cpu/simple/timing.cc
index ad04c8d3b..523d81d0b 100644
--- a/src/cpu/simple/timing.cc
+++ b/src/cpu/simple/timing.cc
@@ -118,11 +118,11 @@ TimingSimpleCPU::drain(Event *drain_event)
// an access to complete.
if (status() == Idle || status() == Running || status() == SwitchedOut) {
changeState(SimObject::DrainedTiming);
- return false;
+ return true;
} else {
changeState(SimObject::Draining);
drainEvent = drain_event;
- return true;
+ return false;
}
}