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authorGabe Black <gblack@eecs.umich.edu>2007-08-26 21:45:40 -0700
committerGabe Black <gblack@eecs.umich.edu>2007-08-26 21:45:40 -0700
commit7227ab5f223eb5f4d3ce80ea16bff5f87c3300b6 (patch)
tree3f6c407eccafc56c85a6077fd05f4e98f7e6f034 /src/cpu/simple/timing.cc
parent8d1c7a83d7c052ba312a21ff6c6b8967b1e4b5f4 (diff)
downloadgem5-7227ab5f223eb5f4d3ce80ea16bff5f87c3300b6.tar.xz
Merge with head
--HG-- extra : convert_revision : cc73b9aaf73e9dacf52f3350fa591e67ca4ccee6
Diffstat (limited to 'src/cpu/simple/timing.cc')
-rw-r--r--src/cpu/simple/timing.cc4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/cpu/simple/timing.cc b/src/cpu/simple/timing.cc
index 1e1f43f7d..8d1cf9a17 100644
--- a/src/cpu/simple/timing.cc
+++ b/src/cpu/simple/timing.cc
@@ -583,7 +583,7 @@ TimingSimpleCPU::IcachePort::ITickEvent::process()
bool
TimingSimpleCPU::IcachePort::recvTiming(PacketPtr pkt)
{
- if (pkt->isResponse()) {
+ if (pkt->isResponse() && !pkt->wasNacked()) {
// delay processing of returned data until next CPU clock edge
Tick next_tick = cpu->nextCycle(curTick);
@@ -686,7 +686,7 @@ TimingSimpleCPU::DcachePort::setPeer(Port *port)
bool
TimingSimpleCPU::DcachePort::recvTiming(PacketPtr pkt)
{
- if (pkt->isResponse()) {
+ if (pkt->isResponse() && !pkt->wasNacked()) {
// delay processing of returned data until next CPU clock edge
Tick next_tick = cpu->nextCycle(curTick);