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authorAndreas Hansson <andreas.hansson@arm.com>2012-01-17 12:55:09 -0600
committerAndreas Hansson <andreas.hansson@arm.com>2012-01-17 12:55:09 -0600
commitde34e49d15b95cc8be51dbed2e98c469e7486959 (patch)
treefc3d2ab7d4c8c75fedbff44bb29d479c620eb620 /src/cpu/simple/timing.cc
parentb3f930c884ef23e4d784553fdccc91a772334fd7 (diff)
downloadgem5-de34e49d15b95cc8be51dbed2e98c469e7486959.tar.xz
MEM: Simplify ports by removing EventManager
This patch removes the inheritance of EventManager from the ports and moves all responsibility for event queues to the owner. Eventually the event manager should be the interface block, which could either be the structural owner or a subblock like a LSQ in the O3 CPU for example.
Diffstat (limited to 'src/cpu/simple/timing.cc')
-rw-r--r--src/cpu/simple/timing.cc2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/cpu/simple/timing.cc b/src/cpu/simple/timing.cc
index 70583cae9..f8d13efd9 100644
--- a/src/cpu/simple/timing.cc
+++ b/src/cpu/simple/timing.cc
@@ -862,7 +862,7 @@ TimingSimpleCPU::DcachePort::recvTiming(PacketPtr pkt)
// faster than a CPU we could get two responses before
// next_tick expires
if (!retryEvent.scheduled())
- schedule(retryEvent, next_tick);
+ cpu->schedule(retryEvent, next_tick);
return false;
}
}