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authorSteve Reinhardt <stever@eecs.umich.edu>2006-10-08 14:48:24 -0700
committerSteve Reinhardt <stever@eecs.umich.edu>2006-10-08 14:48:24 -0700
commit5df93cc1cd5ce8272032ad1cbf5265b5fdb4713f (patch)
treee3b4acbe3c0df3f7e73afb81e087c9420fb9b430 /src/cpu/simple/timing.cc
parent911381321b294fa5a8d2dd77eaabc7473ffe5e6f (diff)
downloadgem5-5df93cc1cd5ce8272032ad1cbf5265b5fdb4713f.tar.xz
Replace tests of LOCKED/UNCACHEABLE flags with isLocked()/isUncacheable().
--HG-- extra : convert_revision : f22ce3221d270ecf8631d3dcaed05753accd5461
Diffstat (limited to 'src/cpu/simple/timing.cc')
-rw-r--r--src/cpu/simple/timing.cc4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/cpu/simple/timing.cc b/src/cpu/simple/timing.cc
index cd43bb5fc..a394468b9 100644
--- a/src/cpu/simple/timing.cc
+++ b/src/cpu/simple/timing.cc
@@ -257,7 +257,7 @@ TimingSimpleCPU::read(Addr addr, T &data, unsigned flags)
}
// This will need a new way to tell if it has a dcache attached.
- if (req->getFlags() & UNCACHEABLE)
+ if (req->isUncacheable())
recordEvent("Uncached Read");
return fault;
@@ -342,7 +342,7 @@ TimingSimpleCPU::write(T data, Addr addr, unsigned flags, uint64_t *res)
}
// This will need a new way to tell if it's hooked up to a cache or not.
- if (req->getFlags() & UNCACHEABLE)
+ if (req->isUncacheable())
recordEvent("Uncached Write");
// If the write needs to have a fault on the access, consider calling