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authorRon Dreslinski <rdreslin@umich.edu>2006-11-13 18:51:16 -0500
committerRon Dreslinski <rdreslin@umich.edu>2006-11-13 18:51:16 -0500
commita962fc4f561126bea65f3dd52a7194c5527d255a (patch)
tree0371556ab67772ca4023acd65618df67d123bb5d /src/cpu/simple/timing.cc
parent023fccff0e7f6e2be144c56567b58845cc7383f5 (diff)
downloadgem5-a962fc4f561126bea65f3dd52a7194c5527d255a.tar.xz
Make CPU models signal to update the snoop ranges
--HG-- extra : convert_revision : 717b62510f28a69af99453309fbbb458359eeb2a
Diffstat (limited to 'src/cpu/simple/timing.cc')
-rw-r--r--src/cpu/simple/timing.cc11
1 files changed, 10 insertions, 1 deletions
diff --git a/src/cpu/simple/timing.cc b/src/cpu/simple/timing.cc
index db2c940c0..1ea2df894 100644
--- a/src/cpu/simple/timing.cc
+++ b/src/cpu/simple/timing.cc
@@ -82,8 +82,13 @@ TimingSimpleCPU::CpuPort::recvFunctional(PacketPtr pkt)
void
TimingSimpleCPU::CpuPort::recvStatusChange(Status status)
{
- if (status == RangeChange)
+ if (status == RangeChange) {
+ if (!snoopRangeSent) {
+ snoopRangeSent = true;
+ sendStatusChange(Port::RangeChange);
+ }
return;
+ }
panic("TimingSimpleCPU doesn't expect recvStatusChange callback!");
}
@@ -101,6 +106,10 @@ TimingSimpleCPU::TimingSimpleCPU(Params *p)
cpu_id(p->cpu_id)
{
_status = Idle;
+
+ icachePort.snoopRangeSent = false;
+ dcachePort.snoopRangeSent = false;
+
ifetch_pkt = dcache_pkt = NULL;
drainEvent = NULL;
fetchEvent = NULL;