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| author | Kevin Lim <ktlim@umich.edu> | 2006-07-05 16:08:18 -0400 |
|---|---|---|
| committer | Kevin Lim <ktlim@umich.edu> | 2006-07-05 16:08:18 -0400 |
| commit | b973fae85d47a8184204d5d38b32ad3d427ce41c (patch) | |
| tree | f101b7e4c91c1672bc21de12a4eb01e4120b1510 /src/cpu/simple/timing.cc | |
| parent | 4201ec84b2dd7d96148bf661124dd7b5d0e7204b (diff) | |
| parent | ae78c465313d6ca1dc71e8b9731e952bb3c8c09b (diff) | |
| download | gem5-b973fae85d47a8184204d5d38b32ad3d427ce41c.tar.xz | |
Merge ktlim@zizzer:/bk/newmem
into zamp.eecs.umich.edu:/z/ktlim2/clean/newmem-merge
src/base/traceflags.py:
src/cpu/SConscript:
Hand merge.
src/cpu/o3/alpha/params.hh:
Hand merge. This needs to get changed.
--HG--
rename : src/cpu/o3/alpha_cpu_builder.cc => src/cpu/o3/alpha/cpu_builder.cc
rename : src/cpu/o3/alpha_params.hh => src/cpu/o3/alpha/params.hh
rename : src/python/m5/objects/AlphaO3CPU.py => src/python/m5/objects/O3CPU.py
extra : convert_revision : 581f338f5bce35288f7d15d95cbd0ac3a9135e6a
Diffstat (limited to 'src/cpu/simple/timing.cc')
| -rw-r--r-- | src/cpu/simple/timing.cc | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/cpu/simple/timing.cc b/src/cpu/simple/timing.cc index d5bdcfa9b..877364eff 100644 --- a/src/cpu/simple/timing.cc +++ b/src/cpu/simple/timing.cc @@ -118,6 +118,7 @@ TimingSimpleCPU::quiesce(Event *quiesce_event) // an access to complete. if (status() == Idle || status() == Running || status() == SwitchedOut) { DPRINTF(Config, "Ready to quiesce\n"); + changeState(SimObject::QuiescedTiming); return false; } else { DPRINTF(Config, "Waiting to quiesce\n"); |