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authorKevin Lim <ktlim@umich.edu>2006-11-29 16:08:19 -0500
committerKevin Lim <ktlim@umich.edu>2006-11-29 16:08:19 -0500
commitec3dacc66496206544467116177a2e3934cc394f (patch)
tree304bb55b8da3b85da3edf4f413e93c8cbb195e35 /src/cpu/simple/timing.cc
parented78fc257b7e55a94cae6a54a0eacf7090ed7f26 (diff)
parentc96160cef541b1b4b3e58bf0c56612ef17250e46 (diff)
downloadgem5-ec3dacc66496206544467116177a2e3934cc394f.tar.xz
Merge ktlim@zizzer:/bk/newmem
into zamp.eecs.umich.edu:/z/ktlim2/clean/tmp/test-regress --HG-- extra : convert_revision : 3142f68356458ecd2677c30e9cf0a65005b782c2
Diffstat (limited to 'src/cpu/simple/timing.cc')
-rw-r--r--src/cpu/simple/timing.cc10
1 files changed, 7 insertions, 3 deletions
diff --git a/src/cpu/simple/timing.cc b/src/cpu/simple/timing.cc
index aa23a00e8..dfffb0b1f 100644
--- a/src/cpu/simple/timing.cc
+++ b/src/cpu/simple/timing.cc
@@ -59,9 +59,6 @@ TimingSimpleCPU::init()
for (int i = 0; i < threadContexts.size(); ++i) {
ThreadContext *tc = threadContexts[i];
- // initialize the mem pointers
- tc->init();
-
// initialize CPU, including PC
TheISA::initCPU(tc, tc->readCpuId());
}
@@ -241,6 +238,13 @@ TimingSimpleCPU::activateContext(int thread_num, int delay)
notIdleFraction++;
_status = Running;
+
+#if FULL_SYSTEM
+ // Connect the ThreadContext's memory ports (Functional/Virtual
+ // Ports)
+ tc->connectMemPorts();
+#endif
+
// kick things off by initiating the fetch of the next instruction
fetchEvent =
new EventWrapper<TimingSimpleCPU, &TimingSimpleCPU::fetch>(this, false);