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| author | Gabe Black <gblack@eecs.umich.edu> | 2009-02-25 10:18:36 -0800 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2009-02-25 10:18:36 -0800 |
| commit | da61c4b3ee4571d43f7133640eeda2cf51e21cd9 (patch) | |
| tree | 65b568e31d2c4f88f6b1c08b34bfaadd1bad15ac /src/cpu/simple/timing.cc | |
| parent | ba6918463049c5a60d4375348c99e46d9901d1e8 (diff) | |
| download | gem5-da61c4b3ee4571d43f7133640eeda2cf51e21cd9.tar.xz | |
CPU: Don't fetch when executing a macroop.
If the CPL changes mid macroop, the end of the instruction might not be
priveleged enough to execute the beginning.
Diffstat (limited to 'src/cpu/simple/timing.cc')
| -rw-r--r-- | src/cpu/simple/timing.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/cpu/simple/timing.cc b/src/cpu/simple/timing.cc index 3f5778138..f398365d3 100644 --- a/src/cpu/simple/timing.cc +++ b/src/cpu/simple/timing.cc @@ -667,7 +667,7 @@ TimingSimpleCPU::fetch() bool fromRom = isRomMicroPC(thread->readMicroPC()); - if (!fromRom) { + if (!fromRom && !curMacroStaticInst) { Request *ifetch_req = new Request(); ifetch_req->setThreadContext(_cpuId, /* thread ID */ 0); setupFetchRequest(ifetch_req); |