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author | Andreas Hansson <andreas.hansson@arm.com> | 2012-03-30 09:38:35 -0400 |
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committer | Andreas Hansson <andreas.hansson@arm.com> | 2012-03-30 09:38:35 -0400 |
commit | a14013af3a9e04d68985aea7bcff6c1e70bdbb82 (patch) | |
tree | 67e1fcae84daca1bd507d439a24919d178f4d16e /src/cpu/simple/timing.cc | |
parent | 390cfc7be9e5e477451a31a1dc8df82b42ee4011 (diff) | |
download | gem5-a14013af3a9e04d68985aea7bcff6c1e70bdbb82.tar.xz |
CPU: Unify initMemProxies across CPUs and simulation modes
This patch unifies where initMemProxies is called, in the init()
method of each BaseCPU subclass, before TheISA::initCPU is
called. Moreover, it also ensures that initMemProxies is called in
both full-system and syscall-emulation mode, thus unifying also across
the modes. An additional check is added in the ThreadState to ensure
that initMemProxies is only called once.
Diffstat (limited to 'src/cpu/simple/timing.cc')
-rw-r--r-- | src/cpu/simple/timing.cc | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/src/cpu/simple/timing.cc b/src/cpu/simple/timing.cc index 3d1fe081d..f661756da 100644 --- a/src/cpu/simple/timing.cc +++ b/src/cpu/simple/timing.cc @@ -64,6 +64,10 @@ void TimingSimpleCPU::init() { BaseCPU::init(); + + // Initialise the ThreadContext's memory proxies + tcBase()->initMemProxies(tcBase()); + if (FullSystem) { for (int i = 0; i < threadContexts.size(); ++i) { ThreadContext *tc = threadContexts[i]; @@ -71,9 +75,6 @@ TimingSimpleCPU::init() TheISA::initCPU(tc, _cpuId); } } - - // Initialise the ThreadContext's memory proxies - tcBase()->initMemProxies(tcBase()); } void |