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author | Gabe Black <gblack@eecs.umich.edu> | 2007-10-22 14:30:45 -0700 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2007-10-22 14:30:45 -0700 |
commit | 93da9eb7f6d9b2ca84de74afd3e0cb07188db9e6 (patch) | |
tree | c4584185c1f9ed37266e927ba112092dd881eb11 /src/cpu/simple/timing.hh | |
parent | 43cb78004b73c3f98f3429cebb3f846a0f6ac8d3 (diff) | |
download | gem5-93da9eb7f6d9b2ca84de74afd3e0cb07188db9e6.tar.xz |
CPU: Add functions to the "ExecContext"s that translate a given address.
--HG--
extra : convert_revision : 7d898c6b6b13094fd05326eaa0b095a3ab132397
Diffstat (limited to 'src/cpu/simple/timing.hh')
-rw-r--r-- | src/cpu/simple/timing.hh | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/cpu/simple/timing.hh b/src/cpu/simple/timing.hh index 668b6ddaf..d7554f6de 100644 --- a/src/cpu/simple/timing.hh +++ b/src/cpu/simple/timing.hh @@ -189,9 +189,15 @@ class TimingSimpleCPU : public BaseSimpleCPU template <class T> Fault read(Addr addr, T &data, unsigned flags); + Fault translateDataReadAddr(Addr vaddr, Addr &paddr, + int size, unsigned flags); + template <class T> Fault write(T data, Addr addr, unsigned flags, uint64_t *res); + Fault translateDataWriteAddr(Addr vaddr, Addr &paddr, + int size, unsigned flags); + void fetch(); void completeIfetch(PacketPtr ); void completeDataAccess(PacketPtr ); |