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author | Ali Saidi <Ali.Saidi@ARM.com> | 2012-09-25 11:49:40 -0500 |
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committer | Ali Saidi <Ali.Saidi@ARM.com> | 2012-09-25 11:49:40 -0500 |
commit | 0c99d21ad748371e801508a8c3652e07e2e56f93 (patch) | |
tree | a2a52170a8a88ce919cecb4309428999e5380cfd /src/cpu/simple/timing.hh | |
parent | 29acf859ebde2cf219ae636f60d8a46db7a1bb94 (diff) | |
download | gem5-0c99d21ad748371e801508a8c3652e07e2e56f93.tar.xz |
ARM: Squash outstanding walks when instructions are squashed.
Diffstat (limited to 'src/cpu/simple/timing.hh')
-rw-r--r-- | src/cpu/simple/timing.hh | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/src/cpu/simple/timing.hh b/src/cpu/simple/timing.hh index 19a4f818e..a2570abe6 100644 --- a/src/cpu/simple/timing.hh +++ b/src/cpu/simple/timing.hh @@ -269,6 +269,14 @@ class TimingSimpleCPU : public BaseSimpleCPU void completeDataAccess(PacketPtr pkt); void advanceInst(Fault fault); + /** This function is used by the page table walker to determine if it could + * translate the a pending request or if the underlying request has been + * squashed. This always returns false for the simple timing CPU as it never + * executes any instructions speculatively. + * @ return Is the current instruction squashed? + */ + bool isSquashed() const { return false; } + /** * Print state of address in memory system via PrintReq (for * debugging). |