Rename quiesce to drain to avoid confusion with the pseudo instruction.

src/cpu/simple/timing.cc:
src/cpu/simple/timing.hh:
src/python/m5/__init__.py:
src/python/m5/config.py:
src/sim/main.cc:
src/sim/sim_events.cc:
src/sim/sim_events.hh:
src/sim/sim_object.cc:
src/sim/sim_object.hh:
    Rename quiesce to drain.

--HG--
extra : convert_revision : fc3244a3934812e1edb8050f1f51f30382baf774

1 files changed, 3 insertions, 3 deletions

diff --git a/src/cpu/simple/timing.hh b/src/cpu/simple/timing.hh
index d91144e4a..c360e553e 100644
--- a/src/cpu/simple/timing.hh
+++ b/src/cpu/simple/timing.hh
@@ -64,7 +64,7 @@ class TimingSimpleCPU : public BaseSimpleCPU
 
     Status status() const { return _status; }
 
-    Event *quiesceEvent;
+    Event *drainEvent;
 
   private:
 
@@ -133,7 +133,7 @@ class TimingSimpleCPU : public BaseSimpleCPU
     virtual void serialize(std::ostream &os);
     virtual void unserialize(Checkpoint *cp, const std::string &section);
 
-    virtual bool quiesce(Event *quiesce_event);
+    virtual bool drain(Event *drain_event);
     virtual void resume();
     virtual void setMemoryMode(State new_mode);
 
@@ -154,7 +154,7 @@ class TimingSimpleCPU : public BaseSimpleCPU
     void completeDataAccess(Packet *);
     void advanceInst(Fault fault);
   private:
-    void completeQuiesce();
+    void completeDrain();
 };
 
 #endif // __CPU_SIMPLE_TIMING_HH__