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| author | Steve Reinhardt <stever@eecs.umich.edu> | 2006-05-26 13:48:35 -0400 |
|---|---|---|
| committer | Steve Reinhardt <stever@eecs.umich.edu> | 2006-05-26 13:48:35 -0400 |
| commit | da6a7b1263cf624790f06a5f944366fb113dffc8 (patch) | |
| tree | 16110f2f8efa8b98a42d3b85c43a3a7b8ae1f1ce /src/cpu/simple/timing.hh | |
| parent | cf826ae296a4277bdf2ce46e4484295efde5a3c2 (diff) | |
| download | gem5-da6a7b1263cf624790f06a5f944366fb113dffc8.tar.xz | |
Add names to memory Port objects for tracing.
--HG--
extra : convert_revision : ddf30084e343e8656e4812ab20356292b35507ee
Diffstat (limited to 'src/cpu/simple/timing.hh')
| -rw-r--r-- | src/cpu/simple/timing.hh | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/cpu/simple/timing.hh b/src/cpu/simple/timing.hh index 83be025d9..7f38e629a 100644 --- a/src/cpu/simple/timing.hh +++ b/src/cpu/simple/timing.hh @@ -71,8 +71,8 @@ class TimingSimpleCPU : public BaseSimpleCPU public: - CpuPort(TimingSimpleCPU *_cpu) - : cpu(_cpu) + CpuPort(const std::string &_name, TimingSimpleCPU *_cpu) + : Port(_name), cpu(_cpu) { } protected: @@ -93,7 +93,7 @@ class TimingSimpleCPU : public BaseSimpleCPU public: IcachePort(TimingSimpleCPU *_cpu) - : CpuPort(_cpu) + : CpuPort(_cpu->name() + "-iport", _cpu) { } protected: @@ -108,7 +108,7 @@ class TimingSimpleCPU : public BaseSimpleCPU public: DcachePort(TimingSimpleCPU *_cpu) - : CpuPort(_cpu) + : CpuPort(_cpu->name() + "-dport", _cpu) { } protected: |