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| author | Ron Dreslinski <rdreslin@umich.edu> | 2006-11-13 18:51:16 -0500 |
|---|---|---|
| committer | Ron Dreslinski <rdreslin@umich.edu> | 2006-11-13 18:51:16 -0500 |
| commit | a962fc4f561126bea65f3dd52a7194c5527d255a (patch) | |
| tree | 0371556ab67772ca4023acd65618df67d123bb5d /src/cpu/simple/timing.hh | |
| parent | 023fccff0e7f6e2be144c56567b58845cc7383f5 (diff) | |
| download | gem5-a962fc4f561126bea65f3dd52a7194c5527d255a.tar.xz | |
Make CPU models signal to update the snoop ranges
--HG--
extra : convert_revision : 717b62510f28a69af99453309fbbb458359eeb2a
Diffstat (limited to 'src/cpu/simple/timing.hh')
| -rw-r--r-- | src/cpu/simple/timing.hh | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/cpu/simple/timing.hh b/src/cpu/simple/timing.hh index 408fa315e..fe5d03666 100644 --- a/src/cpu/simple/timing.hh +++ b/src/cpu/simple/timing.hh @@ -82,6 +82,8 @@ class TimingSimpleCPU : public BaseSimpleCPU : Port(_name, _cpu), cpu(_cpu), lat(_lat) { } + bool snoopRangeSent; + protected: virtual Tick recvAtomic(PacketPtr pkt); @@ -166,8 +168,6 @@ class TimingSimpleCPU : public BaseSimpleCPU PacketPtr ifetch_pkt; PacketPtr dcache_pkt; - - int cpu_id; Tick previousTick; |