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author | Gabe Black <gblack@eecs.umich.edu> | 2008-11-13 23:30:37 -0800 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2008-11-13 23:30:37 -0800 |
commit | 7a4d75bae31cfe2064fe0718c7f982f769659b3c (patch) | |
tree | 4a03f89edbee4f8d79983f4fe4541edebedfbbe9 /src/cpu/simple/timing.hh | |
parent | bcfd284d24e1321de863b7578e7ba567a69ba44f (diff) | |
download | gem5-7a4d75bae31cfe2064fe0718c7f982f769659b3c.tar.xz |
CPU: Refactor read/write in the simple timing CPU.
Diffstat (limited to 'src/cpu/simple/timing.hh')
-rw-r--r-- | src/cpu/simple/timing.hh | 10 |
1 files changed, 4 insertions, 6 deletions
diff --git a/src/cpu/simple/timing.hh b/src/cpu/simple/timing.hh index b641b1302..c305d0361 100644 --- a/src/cpu/simple/timing.hh +++ b/src/cpu/simple/timing.hh @@ -65,12 +65,6 @@ class TimingSimpleCPU : public BaseSimpleCPU int outstanding; PacketPtr fragments[2]; - SplitMainSenderState() - { - fragments[0] = NULL; - fragments[1] = NULL; - } - int getPendingFragment() { @@ -102,6 +96,10 @@ class TimingSimpleCPU : public BaseSimpleCPU } }; + Fault buildSplitPacket(PacketPtr &pkt1, PacketPtr &pkt2, RequestPtr &req, + Addr split_addr, uint8_t *data, bool read); + Fault buildPacket(PacketPtr &pkt, RequestPtr &req, bool read); + bool handleReadPacket(PacketPtr pkt); // This function always implicitly uses dcache_pkt. bool handleWritePacket(); |