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| author | Mitch Hayenga <mitch.hayenga@arm.com> | 2015-09-30 11:14:19 -0500 |
|---|---|---|
| committer | Mitch Hayenga <mitch.hayenga@arm.com> | 2015-09-30 11:14:19 -0500 |
| commit | fafa83ed32933fe250d34dfca23fba348429b176 (patch) | |
| tree | 3bf8fd636f1e879273045fefda3b5d7319a38479 /src/cpu/simple/timing.hh | |
| parent | 582a0148b441fe9f4a6f977094c5ce6bf7ab6313 (diff) | |
| download | gem5-fafa83ed32933fe250d34dfca23fba348429b176.tar.xz | |
cpu: Add per-thread monitors
Adds per-thread address monitors to support FullSystem SMT.
Diffstat (limited to 'src/cpu/simple/timing.hh')
| -rw-r--r-- | src/cpu/simple/timing.hh | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/cpu/simple/timing.hh b/src/cpu/simple/timing.hh index d409ac5d2..f1cc09e42 100644 --- a/src/cpu/simple/timing.hh +++ b/src/cpu/simple/timing.hh @@ -132,6 +132,7 @@ class TimingSimpleCPU : public BaseSimpleCPU }; FetchTranslation fetchTranslation; + void threadSnoop(PacketPtr pkt, ThreadID sender); void sendData(RequestPtr req, uint8_t *data, uint64_t *res, bool read); void sendSplitData(RequestPtr req1, RequestPtr req2, RequestPtr req, uint8_t *data, bool read); |