diff options
| author | Gabe Black <gabeblack@google.com> | 2018-11-19 17:20:31 -0800 |
|---|---|---|
| committer | Gabe Black <gabeblack@google.com> | 2018-12-20 19:27:51 +0000 |
| commit | 88bbabe93f339f9db301caf43bf2cca2a0e8048c (patch) | |
| tree | 66323afaa9348f392deafe11d88973fd3034001b /src/cpu/simple | |
| parent | 67d58e81825d7dff17def2cfeedf5d958141be55 (diff) | |
| download | gem5-88bbabe93f339f9db301caf43bf2cca2a0e8048c.tar.xz | |
arch, cpu: Remove float type accessors.
Use the binary accessors instead.
Change-Id: Iff1877e92c79df02b3d13635391a8c2f025776a2
Reviewed-on: https://gem5-review.googlesource.com/c/14457
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Gabe Black <gabeblack@google.com>
Diffstat (limited to 'src/cpu/simple')
| -rw-r--r-- | src/cpu/simple/base.cc | 2 | ||||
| -rw-r--r-- | src/cpu/simple/exec_context.hh | 19 |
2 files changed, 1 insertions, 20 deletions
diff --git a/src/cpu/simple/base.cc b/src/cpu/simple/base.cc index 825d3103f..c597ac904 100644 --- a/src/cpu/simple/base.cc +++ b/src/cpu/simple/base.cc @@ -493,7 +493,7 @@ BaseSimpleCPU::preExecute() // maintain $r0 semantics thread->setIntReg(ZeroReg, 0); #if THE_ISA == ALPHA_ISA - thread->setFloatReg(ZeroReg, 0.0); + thread->setFloatRegBits(ZeroReg, 0); #endif // ALPHA_ISA // check for instruction-count-based events diff --git a/src/cpu/simple/exec_context.hh b/src/cpu/simple/exec_context.hh index 8ff18dd60..1aababf35 100644 --- a/src/cpu/simple/exec_context.hh +++ b/src/cpu/simple/exec_context.hh @@ -191,15 +191,6 @@ class SimpleExecContext : public ExecContext { thread->setIntReg(reg.index(), val); } - /** Reads a floating point register of single register width. */ - FloatReg readFloatRegOperand(const StaticInst *si, int idx) override - { - numFpRegReads++; - const RegId& reg = si->srcRegIdx(idx); - assert(reg.isFloatReg()); - return thread->readFloatReg(reg.index()); - } - /** Reads a floating point register in its binary format, instead * of by value. */ FloatRegBits readFloatRegOperandBits(const StaticInst *si, int idx) override @@ -210,16 +201,6 @@ class SimpleExecContext : public ExecContext { return thread->readFloatRegBits(reg.index()); } - /** Sets a floating point register of single width to a value. */ - void setFloatRegOperand(const StaticInst *si, int idx, - FloatReg val) override - { - numFpRegWrites++; - const RegId& reg = si->destRegIdx(idx); - assert(reg.isFloatReg()); - thread->setFloatReg(reg.index(), val); - } - /** Sets the bits of a floating point register of single width * to a binary value. */ void setFloatRegOperandBits(const StaticInst *si, int idx, |